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Recently, the post silicon new devices and materials, such as wide band gap devices (SiC, GaN), nano devices, organic devices and so on, are intensively researched. It is highly demanded to satisfy the requests of high performance, energy saving and cost saving for the next generation products. To introduce it into the market timely with matured quality, it is very important to understand its characteristics and improve the device production processes.
Particularly for MIS/MOS structure devices, the interface status is one of the important evaluations to reduce the defect and improve the device quality for yield and product assurance viewpoints. As well as the silicon technology, the analysis of the interface state is demanded for the new devices and new process technology.
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