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Reduce cost, risk, and development time by creating a digital twin of your ASIC design at the point where software meets hardware – a critical, expensive, and high-risk element of any design project
Ultrafast Real-Time Prototyping
The Keysight M8135A/M8136A universal signal processing architecture (USPA) platform combines very high-performance data converters with a flexible, modular FPGA-based prototyping system. USPA enables ASIC engineers to test and verify designs before committing to silicon.
Keysight USPA is an extremely high-performance, flexible, fully programmable real-time platform for developing and testing new signal processing algorithms, ultrafast data generation and acquisition, and a broad range of ASIC and system-on-a-chip (SoC) rapid prototyping applications. The USPA platform delivers unmatched performance and remarkable cost-effectiveness.
Powerful Data Converters for Leading-Edge Applications
Keysight USPA is the only ASIC prototyping system available with high performance analog-to-digital (ADC) and digital-to-analog (DAC) data converter interfaces.
- Keysight DAC3 is a 6-bit, 72 GSps converter with 17 GHz analog output bandwidth
- Keysight ADC3 is a 6-bit, 68 GSps converter with >34 GHz analog input bandwidth
Powerful data converters make USPA uniquely suited to both coherent and direct detect optical communications research and development. Key applications for USPA are 6G wireless baseband emulation, digital radio frequency memory (DRFM) and general communications system emulation, physics basic research, and many high-speed data acquisition applications, such as radar channel emulation and radio astronomy.
USPA is available in two
product formats. M8135A is a pre-configured system for single-channel
transceiver applications. M8136A is a fully configurable set of modular
components that can be combined to support a wide range of both single and
multi-channel applications. An M8135A system can also be expanded with M8136A
components, leveraging the modularity, scalability, and cost-effective
reusability of the USPA platform architecture.