PCI Express (PCIe)

PCIe Design and Simulation

The design of high-speed serial data links becomes significantly more complex as data rates increase — channel topologies become more diverse, and the number of parameters that need to be tuned for active components multiply. You need to use simulation to optimize the signal and power integrity of your PCIe designs and analyze the electromagnetic (EM) effects of components such as high-speed integrated circuit (IC) packages and printed circuit board (PCB) interconnects. We can help you quickly and effectively evaluate the end-to-end performance of your PCIe 6.0 links.

PCIe Receiver Test

Extracting digital content from the PCIe signal is significantly more challenging with the PAM4 format and PCIe speeds reaching up to 64 GT/s.

At these high data transfer rates with PAM4 signals, PCIe receivers often receive a heavily degraded signal due to the channel’s high-frequency loss characteristics, resulting in unacceptable bit error ratios (BERs). Bit errors are handled with forward error correction (FEC); new measurements are required like signal-to-noise and distortion ratio (SNDR).

Keysight‘s M8040A high-performance BERT is the only PAM4-capable BERT approved for Gold Suite PCIe receiver test. We show you the true performance of your design to guarantee your PCIe success.

With Keysight by your side, you get a smooth transition from PCI Express 5.0 to 6.0.

PCIe Protocol Test

Protocol validation occurs at the physical layer, data link layer, and transaction layer. In addition to the mandatory protocol compliance tests, the PCI-SIG recommends more than a hundred additional tests to properly characterize your design. A key area of protocol test is link training and status state machine (LTSSM).

Once the physical layer of a PCIe link has allowed the link to train, you need to determine if data packets are reliably transferred between link partners. You need protocol analysis and exerciser tools to determine if your PCIe device can successfully communicate to its link partner. We can help you perform complex protocol tests and quickly debug any detected errors to ensure compliance with your PCIe devices.