# Quick Start for Signal Integrity Design Using Advanced Design System (ADS)

A part of the Keysight EEsof EDA High Speed Digital Design Workflow

Technical Overview

A Diversion into S-Parameters

If you pushed into the hierarchy, you’d have noticed some components were defined using S-parameters. So let’s take a short break from the keyboard and first say why we use network parameters in general and S-parameters in particular, to characterize high frequency structures and components.

For low speed digital logic we only consider the forward propagation of signals, because, although reflections exists, they generally die down quickly if the interconnection flight time (propagation time) is short compared to the rise and fall times and the bit period. In fact, the incident signal or wave is partly transmitted and partly reflected.

So, instead of a single transfer function, it might seem we now need two parameters to characterize a 2-port component at each frequency. In fact, the situation is more complex. The output port is also being bombarded with waves reflected off of the component in front of it in the cascade.

These reverse waves are also partly transmitted (backwards down the cascade) and partly reflected off of the output port (heading back up the cascade). So we actually need four numbers per frequency point. Each is a complex number, representing magnitude and phase of the respective wave, relative the incident wave.

For reasons given below, it is convenient to collect the four numbers together in a two-by-two matrix called network parameters. There are several formats each of which has their pros and cons. The most convenient format for measurement purposes is the S-parameter format, because you can measure S-parameters using standard load, source, and connector impedances such as 50 Ω.

In contrast, direct measurement of, say, Z parameters requires opens and short loads and sources, which are difficult to make at high frequencies and can damage some components. Once you have the S-parameters measured, there are simple calculations to convert to other formats if needed.

The beauty of network parameters is that you don’t have to sum an infinite series of partly reflected and partly transmitted waves bouncing up and down the cascade. The trick is that you can easily calculate the network parameters of arbitrary cascade of two-port components using a simple matrix calculation.

All the internal reflections inside the newly created “black box” can be ignored, and the cascade treated as a composite two-port network, characterized by only four parameters per frequency point.

Network parameters can be generalized to more than two-ports and more than simple cascade connection. Here we’ll use a 4 X 4 matrix S-parameters to represent a four-port network: a pair of coupled transmission lines such as those used in a differential interconnect.

One of the things ADS does really well is convert frequency domain S-parameters into a time-domain model. Other tools often leave you with an incorrect non-causal or non-passive conversion.

Channel Simulator: Bit-by-Bit Mode

By now you might be asking, “What’s the difference between traditional transient (SPICE-like) simulation and the two modes of Channel Simulator?”

Bit-by-bit mode works in two phases. First, we probe your schematic with a single step input. We use the transient simulator but we also automatically use convolution to deal with any components defined in the frequency domain and EM simulators to deal with distributed layout components.

The computationally expensive transient simulation needs to run only for a short length of time, equal to the pulse response of the channel.

In phase two we use the step response from the above phase one as a linear time invariant model. We can then use computationally inexpensive superposition to calculate the output for millions of bits without having to call the transient, convolution, or EM simulators again.

In statistical mode, again we have two phases. The first phase is the same as for bit-by-bit mode, but the second step is much quicker. There’s no need for brute force superposition of each bit: just some mathematical calculations based on:

- ISI and crosstalk implied in the through and crosstalk pulse responses

- Jitter spec

- Equalizer spec

- Line coding