PathWave ADS Memory Designer workflow shortens design cycles and reduces project delays with the easy-to-use smart components and bus-wires. The Memory Designer element also includes compliance testing and DDR bus simulator.

Highlights

The W3025E PathWave Memory Designer includes:

  • DDR Bus Simulation (statistical and single ended IBIS-AMI)
  • Ease of setup with smart bus-wiring, group editing models, single schematic for read and write cycles
  • Quickly generate IBIS-AMI models for DDR5/LPDDR5 and future technologies
  • Design and Test solution with compliance applications

The PathWave ADS Memory Designer element is a predictive, productive, and insightful workflow for next-generation memory designs. Utilize the smart components and bus wire for quick setup. IBIS files can be applied to a group of signals for fast setup and parameterization of settings. The Memory Designer workflow minimizes the engineering effort required to setup, simulate buses, and perform compliance testing. Keysight has a unique capability for compliance testing, utilizing the same measurement science for both simulation and hardware verification stages, making simulation to measurement comparison easy and accurate.

Note: This element license requires a host bundle to work. For recommended bundle configurations, click here.

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