Keysight EEsof EDA
SystemVue Electronic System-Level (ESL) Design Software
Shortest path from imagination to verified hardware for physical layer systems design
Discovering SystemVue
SystemVue is a multi-domain modeling implementation and verification cockpit for electronic system-level (ESL) design. It allows system architects and algorithm developers to cross traditional Baseband and RF boundaries in order to innovate the physical layer (PHY) of next generation aerospace/defense and wireless communications systems. SystemVue simplifies tasks by integrating popular DSP modeling and implementation interfaces, along with accurate RF EDA tools, Standards/IP references, and Test and Measurement links into a single, highly productive environment. The result is that SystemVue “speaks RF,” links model-based design across important domains, and cuts PHY development and verification time in half.
Enabling Model Based Design Across Baseband and RF Domains
Wherever you are in the design flow
System Architects
- Simple and easy model based design workflow
- Multi-domain modeling for RF, baseband, and algorithms
- Fast link level analysis of Layer 1 systems
Baseband architects and algorithm developers
- Multi-language modeling
- Target neutral IP development
- Cross domain debugging of IP
RF system architects
- Accurate models and analysis in native Frequency domain
- Flow integrity with circuit level design (ADS)
- Integration with vector modulation analysis
Embedded FPGA and DSP HW designers
- Advanced analysis and heuristics for fixed point systems
- Link algorithms to HW in common formats
- Structured verification from design to implementation
System verifiers
- Use measurement-grade reference IP, or create custom signals
- Verify system block level interoperability at all levels of H/W abstraction
- IP aggregation, including both BB and RF systems
Baseband Algorithms and Modeling
Design flow connectivity
Open modeling for easy IP integration
- Open modeling interfaces make it easy to adopt and re-use your IP
- Cross-domain debug and verification
- An integrated, tops-down design flow includes RF, Comms, and C++/HDL
SystemVue supports common modeling languages
- Connect to EDA design flows and virtual platforms through code-generation
- Direct integration of MATLAB
FPGA Hardware Design Flow
- Rapid Prototyping of system-level performance
- Fixed-Point Library for hardware-true effects at the system level, prior to targeting
- VHDL/Verilog code generation provides path to rapid prototyping and hardware
Accelerating realistic verification
- Attractive licensing from workgroups to whole enterprises, for IP and asset re-use
- Natural enterprise deployment of model libraries
- Validate SystemC and CatapultC communications PHY models
Accurate RF and Channel Effects for System Architects
Accuracy enables insight
Virtualize the RF to include more RF effects
- Enjoy superior RF results with less detailed RF knowledge, and less RF flow integration
- Virtualize the RF, so that baseband tools can work smarter, faster, independent of RF flow complexity, but with greater confidence
- Dedicated RF system simulator, for RF-true architectures, X-parameters 1 , spurs, analog effects
Connect with real RF design flows
- Close the modeling loop and unite design teams
- Direct links to RF H/W design flows in GoldenGate, ADS, including co-simulation
- Control link-level fidelity with faster, credible RF simulations
- Create better baseband algorithms and system architectures
- More robust algorithms, through drive-test realism in the architecture phase
- Create and refine RF System Architectures, then use them in System-level Dataflow
- Accurate RF and channel capabilities enable link-level insights
- Informed RF-Baseband partitioning allows reduced design margins
- Include phased array antennas for 5G, radar and satellite RF system analysis