- Validate the BER performance of 800GE and 400GE optical transceivers, active and passive copper cables, silicon devices with the G800GE-02 800GE BERT, FEC and packet blast test capabilities with Keysight’s KiOSK browser application.
- Find problems faster with KiOSK browser-based single page application (SPA), system-view of all the BERT, FEC, and packet statistics of all the lanes or ports with 1x800GE, 2x400GE, 4x200GE, 8x100GE and 8x100GE (ck) over 106.25 Gb/s host electrical lanes, and 1x400GE, 2x200GE, 4x100GE and 8x50GE Ethernet speed support over 53.125Gb/s host electrical lanes.
- Measure full line rate BER, FEC, and L2 packet performance in minutes, not hours — evaluate optical transceivers, copper interconnects and silicon devices BER at all Ethernet speeds simultaneously with Keysight’s Enhanced BERT option (that is, BERT inferred FEC).
- Perform long-duration (timed tests) and stress tests by using Keysight’s KP4 FEC symbol bit error density distribution analysis — excellent for catching bursty errors that occur over time.
- Connect any G800GE-02 to Keysight’s M8040A high-performance BERT analyzer or the Infiniium UXR‑Series Oscilloscopes for advanced FEC-aware physical layer test and validation of IEEE802.3ck, and OIF CEI-112G or CEI-56 IA specifications.
- Connect a 400GE or an 800GE module compliance board or your device evaluation and development board by using the G800GE-02 electrical coaxial cable system.
World’s First Line-Rate 2 x 800GE Test System
Keysight’s G800GE-02 OSFP800 and QSFP-DD800 400GE and 800GE test systems make the challenges of qualifying bit error rate (BER) and forward error correction (FEC) symbol error correction performance, link reliability, design validation, and long/short-term stress-testing with line-rate FEC and simple layer 2 packet traffic on 800GE and 400GE electronic devices easier and affordable. Used to validate chips, optical transceivers, copper cables, or silicon device on a development board, the G800GE-02 is a purpose-built BERT and FEC test system with 106.25Gb/s and 53.125Gb/s lanes electrical lane, PAM4 signaling per port that gives you the ability to find a problem in minutes, not hours. It shows a system-level view of the BER, FEC performance and simple packet processing of all lanes and on the ports, as required, all at once, in real time.
More Accurate Measurements Using Electrical Coaxial Connectivity
The G800GE-02 1-port optical transceiver and 1-port interface electrical Tx/Rx coaxial interface models are a unique, multiport benchtop test chassis. The coaxial interface is an excellent medium for electrical signals with all the features of its accompanying optical port. Its use results in more accurate measurements because it offers an extremely clean test signal with minimal signal loss. The coaxial interface connects with Module Compliance Boards and your device evaluation boards to validate devices under test with the G800GE’s BERT, FEC, and packet transmission and analysis capabilities.
High-Performance BERT Analyzer Synchronization
The G800GE-02 OSFP800 and QSFP-DD800 chassis can be upgraded in the field to support interconnection and synchronization with Keysight’s M8040A high-performance BERT analyzer or Infiniium UXR Oscilloscopes. The combined system is a symbol-striped, FEC-aware physical layer BER tester for 106.25Gb/s and 53.125Gb/s electrical lanes. It is a solution for 800GE and 400GE characterization, stress, and conformance tests, and to perform physical-layer channel stress and impairment of a channel. Additionally, advanced tests such as TDECQ and optical receiver stress testing (ORST) may be performed for optical transceivers in conjunction with various Keysight Layer 1 instruments such as a real-time oscilloscope, a DCA, and other equipment and accessories depending on the application.
100G Serial FEC-Aware Conformance Testing Demonstration
Reducing cost and power per transported bit, the 100G serial interface will become the workhorse for hyperscale data centers deploying increasing port density in 400GE and 800GE ports today. For interoperability and conformance testing, predicting the forward error correction margin under realistic conditions requires the ability to quantify and understand error burst mechanisms. This demonstration shows such validation using Keysight's G800GE, the industry’s first electrical lane FEC-aware receiver conformance test solution for 100G serial interfaces.