How to Test PCIe® 5.0 Receiver Compliance

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High-Performance BERT
+ High-Performance BERT
High-Performance BERT
+ High-Performance BERT

Setting up a receiver compliance test for a PCIe® 5.0 device

To ensure interoperability, PCIe 5.0 devices need to pass receiver compliance tests for certification by the PCI-Special Interest Group (PCI-SIG®). PCIe 5.0 technology encompasses both the base specification for silicon-level development and the card electromechanical (CEM) specification for motherboards and add-in cards. The physical layer (PHY) test specification provides guidance for testing using the CEM form factor.

Before conducting a receiver test, a bit error ratio tester (BERT) pattern generator must be calibrated with an oscilloscope to transmit a worst-case stress test signal. This process involves adding impairments, including incremental loss-induced intersymbol interference (ISI). After calibration, the receiver of the device under test (DUT) applies the test signal, measuring parameters such as the bit error ratio.

PCIe 5.0 receiver compliance test solution

PCIe 5.0 receiver compliance test solution

Receiver testing requires precise stress signal calibration and consistently repeatable bit error ratio measurements. The Keysight automated PCIe 5.0 receiver test solution provides tools to calibrate and test your PCIe device’s receiver performance to comply with PCI-SIG standards. The solution includes the M8040A high-performance BERT running N5991PC5A receiver test compliance software and the UXR-Series oscilloscope running D9120ASIA signal integrity software.
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