The Peripheral Component Interface Express (PCI Express® or PCIe®) standard is a core technology used in many types of computer servers and end point devices. The PCI Special Interest Group (PCI-SIG®) defines PCIe specifications and PCIe compliance tests that guarantee interoperability of Peripheral Component Interface Express systems. PCIe 5.0 is the latest development of the standard. It will enable the mass adoption of 400 gigabit Ethernet (GE) technologies in the data center as it provides full duplex bandwidth of approximately 128 gigabytes per second (GB/s) for a 16-lane system. We can help you simulate, characterize and validate your PCIe designs so you can be confident they will seamlessly pass all required compliance tests and get to market faster.
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PCI Express Design and Simulation
The design of high-speed serial data links becomes significantly more complex as data rates increase — channel topologies become more diverse, and the number of parameters that need to be tuned for active components multiply. You need to use simulation to optimize the signal and power integrity of your PCIe designs and analyze the electromagnetic (EM) effects of components such as high-speed integrated circuit (IC) packages and printed circuit board (PCB) interconnects. We can help you quickly and effectively evaluate the end-to-end performance of your PCIe links.
PCI Express Transmitter Test
You need to test the performance of your PCIe transmitter device to ensure it meets the specifications defined by the PCIe standard. The PCIe specification is primarily concerned with specific types of uncorrelated jitter values. For PCIe speeds that exceed 8 gigatransfers per second (GT/s), PCIe receivers utilize strong equalization. While the equalizer can compensate for data dependent jitter, uncorrelated transmitter jitter cannot be adequately compensated for with the reference receiver equalization specified by the PCIe standard. We can help you test for uncorrelated jitter and ensure the performance of your PCIe transmitter designs.
PCI Express Receiver Test
Extracting digital content from the PCIe signal is significantly more challenging as PCIe speeds exceed 8 GT/s. At these high data transfer rates, PCIe receivers often receive a heavily degraded signal due to the channel’s high-frequency loss characteristics, resulting in unacceptable bit error ratios (BERs). To overcome this, you must design and validate a robust receiver that can tolerate these distorted signals, utilizing equalization techniques that restore the quality of the transmitted signal. We can help you overcome compliance and interoperability challenges with your receiver devices.
PCI Express Interconnect Test
The channel is one of the key elements of the PCI Express system. There are many sources of distortion in the channel that can degrade signal quality from a PCIe transmitter to the PCIe receiver — crosstalk, jitter, and intersymbol interference (ISI) are a few examples. You must measure the loss characteristics across the channel to ensure they are within the limits defined by the PCIe specification for a given data rate. Scattering parameters (S-parameters) are used to characterize high frequency circuits such as the channel in a PCIe system. We can help you quickly validate the parametric aspects of your designs to ensure they are within the performance requirements defined by the PCIe specification.
PCI Express Protocol Test
Protocol validation occurs at the physical layer, data link layer and transaction layer. In addition to the mandatory protocol compliance tests, the PCI-SIG recommends more than a hundred additional tests to properly characterize your design. A key area of protocol test is link training and status state machine (LTSSM).
Once the physical layer of a PCI Express link has allowed the link to train, you need to determine if data packets are reliably transferred between link partners. You need protocol analysis and exerciser tools to determine if your device can successfully communicate to its link partner. We can help you perform complex protocol tests and quickly debug any detected errors to ensure compliance of your PCIe devices.