On-chip measurement via JTAG means no external instrumentation
Available from Xilinx worldwide distributors Avnet and Nu Horizons
Keysight´s Serial Link Optimizer is a software tool that extends the Xilinx ChipScope Pro Serial IO Toolkit and provides easy-to-use BERT, eye mapping, and automatic channel tuning for optimal bit error ratio on your gigabit serial bus implemented with Xilinx FPGA´s.
The Serial Link Optimizer is used together with the internal bit error ratio tester (IBERT) core from the Xilinx ChipScope Pro Serial IO Toolkit. This extended analysis and automatic optimization capability saves you considerable time and expense in optimizing the BER of your serial link.
Experience the serial link optimizer - download the software HERE. It runs in demonstration mode without a license, so you can see how it works. Click here.