Custom PDK Generation for a Ring Resonator
애플리케이션 노트
Photonic Integrated Circuit (PIC) development increasingly relies on photonic Process Design Kits (PDKs) to accelerate design, simulation, and manufacturing workflows. While photonic foundries continue expanding their libraries of active and passive components, many applications require custom or proprietary PDKs to support unique intellectual property, extend existing foundry capabilities, or evaluate innovative device concepts not available in standard component libraries.
This application note presents a practical workflow for creating custom photonic components by combining Keysight ADS Photonic Designer with RSoft device modeling tools. The integrated environment enables engineers to move from detailed device-level simulation to circuit-level photonic design, analysis, and layout generation.
The workflow demonstrates the use of the RSoft Custom-PDK Generation Utility to extract component behavior and generate the required files for creating custom PDK elements within ADS Photonic Designer. Using a half-ring resonator as an example, the note shows how S-matrix data is generated through RSoft FullWAVE Finite-Difference Time-Domain (FDTD) simulation. The extracted model is then converted into a reusable ADS photonic component that can be incorporated into larger PIC designs.
Two custom half-ring resonator components are combined to create and simulate a complete ring resonator circuit, illustrating how custom device models can be seamlessly integrated into photonic circuit workflows. The approach is especially valuable for passive, linear optical components where circuit behavior can be accurately represented through S-parameter models.
By automating the extraction of transfer characteristics and generation of custom PDK files, the RSoft Custom-PDK Generation Utility simplifies the transition from device physics to system-level photonic design. These custom PDKs enable engineers to design, simulate, optimize, and prepare photonic circuits for manufacturing using integrated layout workflows.
This methodology provides a flexible foundation for developing differentiated photonic technologies while reducing design complexity and accelerating innovation in PIC development.