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PathWave RFIC Design 2022 Update 1.0 includes the following new and enhanced capabilities:
- GoldenGate can now use parameterized EM views generated by RFPro to handle circuit simulations including EM variations
- GoldenGate is now supported inside Synopsys Custom Compiler
- Addition of a Verilog-A encryption flow
- The capability of reading RFM models for S-Parameters is now supported
- New model: L-UTSOI 102.6
PathWave RFIC Design 2022 Update 1.0 is available now!
PathWave RFIC Design 2022 Update 1.0 delivers new and enhanced capabilities that improve productivity and efficiency for Silicon RFIC designers. In addition to bug fixes, PathWave RFIC Design 2022 Update 1.0 aims at strengthening the integration inside Cadence's latest ADE flows through native PSF support. A number of major improvements have been made on Hspice compatibility and on the core speed of the parsing capabilities. Finally, this release complements the previous additions in Envelope to reduce runtime (Compact Test Signals and Distortion EVM) with the recent updates on modulation standards leveraged from Keysight instruments. This methodology includes a boost in flexibility as you can switch between Virtual Test Bench versions without waiting for a new release of PathWave RFIC Design.
Looking for another version? View other PathWave RFIC Design (GoldenGate) Product Versions.