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The Transient Convolution + Channel Sim Element contains not only Transient Simulator but also many more capabilities for signal integrity including:
- Convolution method (patented) to create causal and passive time-domain models from S-parameters. Unlike other tools, ADS Convolution handles challenging cases such a long or lossy transmission lines correctly.
- Channel Simulator with Bit-by-bit and Statistical modes including support for IBIS AMI and pre-standard extensions to the specification such as on-die S-parameters (BIRD 152), advanced jitter (BIRD 123), mid-channel redrivers and retimers (BIRD 156) (full details below)
- Eye Probe component that delivers eye diagram analysis including BER contour and bathtub display. Includes eye mask utility with automatic mask violation checking
- Equalizer support with automatic tap optimization
- Ability to check cross-talk with multiple aggressors each at different data rates
- Compliance DesignKits for the DDR2, DDR3, and LPDDR2 standards
- Incorporate transceiver models complying with the IBIS I/O industry-standard (ANSI/EIA-656)
- Time-Domain Reflectometry tool
- Jitter decomposition using the proven EZJIT Plus algorithm used in Keysight instruments
- Broadband SPICE Model Generator, which lets you convert measured or simulated S-parameter models to lumped equivalent or pole zero representations
- Touchstone Combiner for victim/aggressor channel models from 4-port VNA measurements
Chip-to-chip data links are found in almost all consumer and enterprise digital products produced today, from laptop computers to data center servers, telecommunication switching centers and Internet routers.
At lower speeds, SPICE allowed designers to perform simulations using lumped-element models. But at today’s multigigabit per second chip-to-chip data rates high-frequency and distributed effects such as impedance mismatch, reflections, crosstalk, skin effect, and dielectric loss come into play.
Accordingly, signal integrity engineers need to go beyond SPICE. The SPICE-like simulator portion of Advanced Design System (ADS) Transient Convolution + Channel Sim Element accommodates not only lumped-element models but also the distributed transmission line, S-parameter, and EM models that are essential to model high-speed PCB traces. The Transient Convolution and Channel Simulation Element is unique in that it is not simply a high performance point tool, but a set of capabilities integrated into the ADS platform. You can combine system-, circuit-, or EM-level models – each at the appropriate level of abstraction – into one simulation.
Multicore processor support and a new, high-capacity sparse matrix solver achieve a three-fold simulation speed improvement for traditional transient simulations and make this the industry's fastest signal integrity circuit simulator.
Signal integrity engineers need to determine ultralow bit error rate (BER) contours for thousands of points in the design space in order to select the optimum set of characteristics for transmitter, channel, and receiver. Even with multicore and modern linear algebra, transient simulation still takes a prohibitively long time: more than a day for a million bits.
To meet this need, we’ve added two new modes that eliminate the need for long, transient simulations. It takes advantage of the fact that the traces, vias, bond wires, connectors, etc. of the channel are linear and time invariant (“LTI”). This fact lets you avoid the brute force approach of running the transient solver at every time step. You can determine ultralow BER contours in seconds not days. This enables very rapid and complete ‘what if’ design space exploration.
The table below compares the pros and cons of traditional transient with Channel Simulator in Bit-by-bit and Statistical modes.
|Transient (SPICE-like) Simulator||Channel Simulator, Bit-by-bit mode||Channel Simulator, Statistical mode|
|Method||Modified nodal analysis of Kirchoff’s current laws for every time step||Bit-by-bit superposition of step responses||Statistical calculations based on step response|
|Applicability||Linear and non-linear channels
Finite, user-specified bit pattern
Adaptive or fixed equalizer taps
Finite, user-specified bit pattern
Adaptive or fixed equalizer taps
Stochastic props of infinite bit pattern Fixed equalizer taps IBIS AMI (uses a linear approximation for GetWave function if model provides one)
|BER floor in one minute simulation||~10-3||~10-6||~10-16|
|Typical megabit simulation time||25 hours||12 minutes||40 seconds|
Functionality Included in this Element
- High-Frequency SPICE Simulator - Nonlinear, time-domain simulator for analyzing very large base-band circuits, startup transients, oscillators, and high-speed digital and switching circuits.
- Convolution Simulator - Advanced time-domain simulator that extends the capability of the High Frequency SPICE module by accurately simulating frequency-dependent components (distributed elements, S-parameter data files, transmission lines, etc.) in a time-domain simulator.
- IBIS I/O Models - I/O Buffer Information Specification (IBIS) models for modeling the nonlinear behavior of IC drivers, outputs, and receivers, inputs
- Signal Integrity Verification Toolkit - Analyzes sources of performance-degrading jitter in multi-gigabit communication link designs. It helps designers find and remove the causes of jitter before hardware prototyping begins, eliminating costly redesign later in the development cycle.
- Broadband SPICE Model Generator - Provides designers with the capability to convert measured or simulated S-parameter models to lumped equivalent or pole zero representations.
Supported IBIS Keywords Table (Knowledge Center login required)
Learn more about Keysight Advanced Design System (ADS) Simulation Elements