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What's New in x1149 2.0

With the new standard of IEEE 1149.1-2013, you can expect around a 75% increase in test coverage with the following test capabilities:

  • Register mnemonic
  • IC reset control
  • Component initialization mechanism
  • Segmented boundary scan register
  • Power domain support
  • Test mode persistence
  • Electronic Chip Identification (ECID)
  • Procedural Description Language (PDL)

Highlights

x1149 Boundary Scan Analyzer - Versatile yet Easy to use Board Test  Tool

The x1149 is a tool for engineers to perform structural tests, such as open and short tests on their PCBAs. It also performs In-System Programming for devices such as FPGAs and CPLDs.

Additionally, x1149 programs PROM (Programmable Read-Only Memory) devices and execute memory verification tests on devices such as DDR SDRAMs (Double Data Rate Synchronous Dynamic Random-Access Memory).

x1149 2.0 Features

  • IEEE Standards
    • 1149.1-2013 (New)
    • 1149.1-2001 
    • 1149.6-2003
    • 1687-2014 
  • Custom test with Insert Source Language (ISL) 2.0
  • Support Autobank and Scan Path Linker

Test Development

  • Maximize test coverage on connectors and non-boundary scan ICs
  • Excellent debug tools
  • Actionable pin-level failure reporting
  • In-system Programming

Applications

  • Excellent Test Coverage for Netcom, Server Products, and Automotive customers
  • IEEE 1687 Solution for Board Test and Embedded Instrumentation testing
  • Automated Configuration of Scan Path Linkers

Key Specifications

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Keysight boundary scan analyzer

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M6800B
M6800B, x1149 Development License 
Starting from  
This tool is designed for test development purposes before sending to production for runtime usage. It provides a comprehensive scope of test development features, including configuration, data preparation, test generation, fixture generation, and debugging.
M6801B
M6801B x1149 Runtime License Bundle 
Starting from  
Run time license for Boundary Scan Analyzer provides a comprehensive testing solution that is fully compliant with the latest IEEE 1149.1-2013 standard. This license is designed specifically for production runtime testing.
M6802B
M6802B x1149 IEEE1687 Development Feature License 
Starting from  
Provide the capability to test the functionality of embedded instruments within a semiconductor device without defining the instruments or their features.
M6803B
M6803B x1149 IEEE1687 Development Feature License 
Starting from  
Provide the capability to test the functionality of embedded instruments within a semiconductor device without defining the instruments or their features.
M6804B
M6804B x1149 Result Analyzer Feature License 
Starting from  
Result Analyzer is a tool that analyses raw test results to pinpoint the exact device pin location that caused a test failure.
M6806B
M6806B x1149 Software Version 2.0 Upgrade Plan (Runtime & Test Development) 
Starting from  
Software Version 2.0 Upgrade Plan for runtime and test development is a service that allows the user to get the latest software revisions for their Keysight x1149 Boundary Scan Analyzer.
M6808B
M6808B x1149 SW License, SVF Export 
Starting from  
Enable the import of external source files to program CPLD/FPGA devices.
M6813B
M6813B x1149 Software Version 2.0 Upgrade Plan (Runtime only) 
Starting from  
Software Version 2.0 Upgrade Plan for runtime is a service that allows the user to get the latest software revisions for their Keysight x1149 Boundary Scan Analyzer.
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Featured Resources for x1149 Boundary Scan Analyzer

Data Sheets 2023.03.05

x1149 Boundary Scan Analyzer

x1149 Boundary Scan Analyzer

The Keysight x1149 is a comprehensive and versatile board test solution that provides everything you need to efficiently test and analyze circuit boards during every stage of the development process. Whether you're in the research and development phase or preparing for production, the Keysight x1149 makes it easy to design, analyze, and test your circuit boards with its coherent software interface.

2023.03.05

Case Studies 2022.07.21

X1149 Brings Faster Testing for Server Boards

X1149 Brings Faster Testing for Server Boards

ICT (In-Circuit Testing) is well-known for its ability to provide a quick and comprehensive analysis of the PCBA's components and interconnectivity. However, ICT alone may not be sufficient because high-speed PCBA testing may necessitate a different approach. In this case study, we demonstrate how we assisted one of the world's largest original design manufacturers (ODMs) in improving the test process for their high-speed PCBA products.

2022.07.21

Application Notes 2017.11.30

x1149 Boundary Scan Solution for Blade Server Board

x1149 Boundary Scan Solution for Blade Server Board

Keysight’s x1149 offers great flexibility for boundary scan. See how the multi-chain feature helps you achieve boundary scan interconnection easily.

2017.11.30

Application Notes 2014.08.02

Merging Boards on Keysight x1149 Boundary Scan Analyzer

Merging Boards on Keysight x1149 Boundary Scan Analyzer

This application note shows how to connect two or more boards to form a single boundary scan chain using the Keysight x1149 boundary scan analyzer.

2014.08.02

Technical Overviews 2017.08.13

x1149 Pin Constraints Feature

x1149 Pin Constraints Feature

This overview describes how the pin constraints feature can improve boundary scan test coverage and perform debugging, eliminating manual BSDL file editing and test regeneration.

2017.08.13

Application Notes 2014.08.02

Releasing the "Test Sequence" and "Test" to Production on the Boundary Scan Analyzer

Releasing the "Test Sequence" and "Test" to Production on the Boundary Scan Analyzer

This paper describes how to release test sequences and tests to production when using the Keysight x1149 Boundary Scan Analyzer. Learn more.

2014.08.02

Application Notes 2014.08.02

Modifying DDR Libraries for Silicon Nail Test Generation

Modifying DDR Libraries for Silicon Nail Test Generation

Find how to modify DDR libraries for silicon nail test generation on the Keysight x1149 boundary scan analyzer. Explore the nail test generation procedures!

2014.08.02

Application Notes 2015.05.25

Implementing Cover-Extend Test on Boundary Scan Analyzers

Implementing Cover-Extend Test on Boundary Scan Analyzers

Understand the generation process of cover-extend testing, a fixturing design for CET implementation on x1149 boundary scan analyzers. Learn more!

2015.05.25

Application Notes 2015.10.29

Configuring Lattice BSCAN2 Scan Path Linker

Configuring Lattice BSCAN2 Scan Path Linker

Learn how to configure lattice BSCAN2 scan path linkers with a boundary scan linker mux device from Keysight.

2015.10.29

Application Notes 2017.11.30

Boundary Scan DFT Guidelines for Good Test Coverage

Boundary Scan DFT Guidelines for Good Test Coverage

This paper explains what boundary scan, and discusses DFT guidelines for enhancing PCB test coverage and ensure chain integrity.

2017.11.30

View All Resources

View All Resources

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