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X1149 Brings Faster Testing for Server Boards

Case Studies

Organization

• Major ODM, manufacturing server boards for key global companies

 

Challenges

• Improve coverage for PCBA

 

Solutions

• Keysight i3070

• X1149 Boundary Scan Analyzer

 

Results

• 50% less functional testers required, reducing the total cost of test

• 15% improvement over test coverage

 

Introduction 

 

The printed circuit board assembly (PCBA) is integral to every electronic device's function. Most of the electronic products you come across today are almost certain to have undergone rigorous testing. Ensuring that manufactured PCBAs are functional before being sold to the mass market is paramount to preventing manufacturing faults and ensuring that the end product has the expected lifetime. 

 

Depending on its complexity, there are several methods for testing a PCBA, such as in-circuit testing (ICT), functional testing (FCT), and boundary-scan testing. These tests help ensure that manufactured PCBAs are functional and of acceptable quality. Most manufacturers may find ICT (In-Circuit Testing) preferable for a generic electronic product because it provides a quick and comprehensive analysis of the PCBA's components and interconnectivity. However, performing high-speed PCBAs testing may entail a different approach, for which ICT may not be the optimal choice.

 

In this instance, one of the world's largest original design manufacturers (ODM) has reached out to our local representative in an effort to improve their testing process. Their final product is a server board of high-speed PCBA design with limited test nodes to minimize unwanted signal interference. Without proper in-circuit testing, these boards will have to undergo a more complex functional test, which could take four times as long.

 

The Challenge: High-Speed PCBA Testing

 

Complex products such as server boards are densely populated and operate at a much higher clocking frequency. Additional design considerations must be made to preserve signal integrity from undesirable distortion. For example, close running parallel traces may invariably generate electromagnetic interference, and test pads on a high-speed path may result in reflections and signal degradation.

 

In this case, the board has a low in-circuit test coverage due to limited electrical access. While functional testing is comprehensive, it can take up to four times longer test time. In high-volume production of highspeed PCBAs, this difference can become extremely costly for the manufacturer. 

 

The Solution: Keysight i3070 and X1149 Boundary Scan Analyzer

 

Our experience has led us to conclude that a boundary scan test is a better alternative in this situation because it allows the manufacturer to check out the PCBA's functionality without having full access to its internal circuitry. The prerequisite is that the manufacturer needs to design the PCBAs according to the IEEE 1149.1 standard, which requires them to have boundary test cells connected to each pin of the PCBA. Once a single set of data is input through a test access port (TAP) controller, it forms a chain of outputs from each boundary test cell. Using this information, the manufacturer can easily verify the overall functionality of the PCBA without needing to check on its components.

 

In order to have a holistic test on PCBAs, we have proposed Keysight's i3070 Series 6 and x1149 Boundary Scan Analyzer so that an ICT and a boundary scan test can be conducted consecutively on the production floor.

 

It begins with the i3070 inspecting the high-speed PCBA's traces for any shorts or open traces. Once the PCBA passes the i3070's ICT test, it goes on to the x1149 for a boundary scan test to examine the highspeed interconnects in the traces and the memory in the dual in-line memory module (DIMM). By using a boundary scan, the x1149 gives the manufacturer an overall picture of the functionality within the PCBA yet allows for easy identification of manufacturing problems in specific pins. It also circumvents the issue of limited test access due to limited test nodes while keeping the demand for time and resources low.

 

The abovementioned process has several other advantages. For starters, we could prevent the signal interference arising from the boundary scan from affecting the ICT because the ICT and boundary scan are physically separated. Secondly, we could reduce the costs in fixture manufacturing due to lower node counts. And finally, this prevents the DIMM from being damaged by any short circuits found during the ICT tests because shorted PCBA would not be allowed to be tested by the x1149

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