Highlights

  • Symbol rates from 2 to 120 GBd
  • Support for non-return-to-zero (NRZ), PAM4, PAM6, and PAM8 line coding
  • Built-in seven tap de-emphasis for improved channel loss compensation
  • Transition time at < 5 ps and < 100 fs root mean square (RMS) intrinsic random jitter
  • Jitter injection integrated and calibrated for receiver tolerance testing RJ, PJ1, PJ2, BUJ, sRJ, and clk / 2
  • Flexible solution with software license upgradeable functionality

Target Applications

The M8050A helps engineers design and characterize chips, devices, transceiver modules, sub-components, boards, and systems. Quickly test serial I/O ports operating at data rates up to 120 GBd across the server, computing, data center, and communication industries. Combining the M8050A BERT with a Keysight UXR-Series 80 GHz oscilloscope gives you a full 1.6T receiver and transmitter test solution to assess your Ethernet systems.

 

KEY SPECIFICATIONS

Module Type
Pattern Generator
Clock Module
Line Coding
NRZ
PAM4
PAM6
PAM8
Standards
IEEE 802.3ck
Module Type
Line Coding
Standards
Pattern Generator
Clock Module
NRZ
PAM4
PAM6
PAM8
IEEE 802.3ck
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Amplitude:
1.4Vpp @ 120 GBd
Channels:
1 or 2
Clock data recovery built-in:
Yes w/ adj loop bandwidth (16 MHz max)
Equalizer:
FFE
Jitter Type:
SJ (LF, HF)
RJ
BUJ
Clk/2
Line Coding:
NRZ
PAM4
PAM6
PAM8
Link Training:
800G
1.6T
Max Data Rate:
120 GBd
Module Type:
Pattern Generator
Clock Module
Standards:
IEEE 802.3ck

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