TC225 40–72 GHz Doubler

Keysight TC225

40–72 GHz Doubler

1GC1-8048

Data Sheet

Features

– PIN = + 15 dBm

– Wide Bandwidth:

 40–72 GHz

 Usable to 80+ GHz

– Low Conversion Loss:

 13 dB typical

– Low 1/2 and 3/2 spurs:

 –23 dBc typical

Description

The TC225 is a balanced diode frequency doubler consisting of two Schottky diodes and a coplanar balun structure. The doubler provides 15 dB conversion loss and –17.5 dBc 1^st and 3rd order feedthru for input frequencies between 20 and 33.5 GHz.

This IC is fabricated in WPTC’s InGaP/GaAs heterojunction bipolar transistor (HBT) process that provides excellent uniformity, reliability and 1/f noise performance.

Chip Size:

               760 × 760 μm (29.9 × 29.9 mils)

Chip Size Tolerance:

               ± 10 μm (± 0.4 mils)

Chip Thickness:

               127 ± 15 μm (5.0 ± 0.6 mils)

Pad Dimensions:

               80 × 80 μm (3.2 × 3.2 mils)

Absolute Maximum Ratings

DC Specifications/Physical Properties

RF Specifications

Applications

The TC225 is a general–purpose frequency doubler IC suitable for a variety of millimeter– wave source applications.

Biasing

DC bias is applied to the diodes through two bias pads. A symmetric (±1V) scheme is preferred because it results in 0V at the dc–coupled input port. With the addition of an external coupling capacitor at the input port, an asymmetric (+2V, 0V) scheme is also acceptable for those applications that require a single–polarity supply. DC bias improves the conversion performance of the TC225 and greatly expands the range of input powers over which the doubler is approximately linear.

Designs requiring high input power may be interested in other biasing schemes. We have found that conversion loss ripple vs. frequency may be reduced by increasing to a ±3V bias, although there is some reduction in maximum allowed output power. To maximize output power, a current source at 6–9 mA may be used instead of the voltage source to reduce self–biasing. The value of the current source affects match, and can be chosen to minimize conversion loss ripple.

It is possible to maximize output power by eliminating DC bias altogether. This will affect input match at lower powers and reduce power linearity.

Operation

The TC225 consists of two identical Schottky diodes and a coplanar transmission– line balun oriented in an anti–parallel/ series configuration. The diodes’ nonlinear I/V characteristics generate harmonics of the input signal. The balanced topology separates these harmonics by suppressing even harmonics at the input port and odd harmonics at the output port. This configuration results in good conversion performance and low 1/2 and 3/2 spurious levels without the need for external filtering. For best performance, the input signal should have low harmonic and sub–harmonic and sub–harmonic content.

Assembly Techniques

Epoxy die–attach using a conductive epoxy and solder die– attach using a fluxless goldtin solder preform are both suitable assembly methods. The IC must be attached to an electrically conductive surface that forms DC and RF ground for the circuit. Gold wire mesh bonds (500–line/inch or equivalent) should be used at the RF input and output ports. These bonds must be kept as short as possible to minimize parasitic inductance. DC bias may be supplied through conventional 0.7–mil gold wire bonds. In both cases, thermosonic wedge bonding is recommended.

GaAs MMICs are ESD sensitive. MMIC ESD precautions, handling considerations, and die attach and bonding methods are critical factors in successful GaAs MMIC performance and reliability.

Additional References

Keysight Technologies Application Note #54 (5991-3484EN), “GaAs MMIC ESD, Die Attach and Bonding Guidelines” provides basic information on these subjects.