High-Speed Digital Design Software

Have confidence in your PCB designs before build-out

PathWave Advanced Design System (ADS) for signal integrity (SI) and power integrity (PI) is built to handle the challenges of today’s high-data rate, densely-routed, complex printed circuit board (PCB) designs.

Future-Ready Memory Design

The next generation of double data rate (DDR) memories, such as DDR5 and GDDR6, deliver significant performance. These standards also introduce new SI challenges. Designers must generate IBIS-AMI models for receivers, extract accurate electromagnetic (EM) models of the DDR channel, and predict margin to the eye-mask at specific bit error rates. 

PathWave ADS for memory design minimizes the engineering effort required to set up and extract EM models, simulate buses, and perform compliance testing. With the combined capabilities of Memory Designer and SIPro, you can set up your end-to-end DDR analysis five times faster than before. 

Signal Integrity for High-Speed Serial

Each new digital standard brings faster speeds and higher frequencies.  Signal integrity engineers need to have confidence in their channel design, including optimal via design, managing crosstalk, signal loss, jitter, and equalization. 

With advanced channel simulation in PathWave ADS, you can simulate for pulsed amplitude modulation (PAM-4, PAM-3, and PAM-N) signaling schemes. Complemented by fast and accurate signal integrity EM analysis, you can achieve 100% board success by catching critical errors before build-out.

Attend the Keysight University Course
Designing for Signal Integrity (10 min)

Power Integrity with High Speed Digital Design

Power Integrity: More Than Just DC

With lower voltages, higher currents, and multiple supplies, power integrity issues can be difficult to troubleshoot and cost thousands of dollars to fix. Overcoming this challenge requires a cohesive design flow for frequency and time-domain analysis of power distribution networks (PDNs).  With Keysight’s PI design workflow, you can visualize the worst-case ripple caused by a dynamic load and engineer an optimum low-noise PDN.

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Electronic Design and High-Speed Digital Design FAQ

A guide to common questions and answers about electronic design, high-speed digital design, and standards-driven design

Electronic design is the process of creating, testing, and optimizing electronic circuits and systems. It can involve analog, digital, or mixed-signal components and technologies and applies to various domains, such as communications, data centers, and semiconductors.

EDA software is a computer-aided design  category of tools for electronic circuits and systems. EDA software tools simulate the behavior and performance of electronic circuits and systems under various conditions and scenarios before fabrication or implementation. They perform different types of simulation, such as logic, functional, timing, electrical, thermal, and electromagnetic, helping designers reduce the risk of design errors, improve the quality of the final product, and save time and money in the development process.

High-speed digital design is a subset of electronic design that deals with the physical layer of digital circuits and communication systems operating at high data rates. It requires special attention to the effects of signal integrity, power integrity, electromagnetic interference, and thermal management. High-speed digital design can enable faster data transfer, lower power consumption, and higher performance in electronic systems.

Standards-driven design is an electronic design method that follows predefined specifications and protocols for communication, data exchange, and interoperability between different devices and systems. Standards-based design can facilitate compatibility, reliability, and scalability in electronic systems. Examples of standards-based design include USB, PCIe® , UCIe, and DDR.

USB is a standard for communication and power delivery between devices and hosts, such as computers, smartphones, cameras, and peripherals. USB supports various data rates, from 1.5 Mbps (USB 1.0) to 80 Gbps (USB4 Version 2.0). USB also supports different power delivery modes, from 2.5 W (USB 2.0) to 240 W (USB PD 3.1). USB4 Version 2.0 is the latest version of the standard and is backward compatible with USB 3.2, USB 2.0, and Thunderbolt 3.

PCIe is a standard for high-speed serial communication between devices and hosts, such as computers, graphics cards, network cards, and storage devices. PCIe supports various data rates, from 2.5 GT/s (PCIe 1.0) to 64 GT/s (PCIe 6.0). The PCI Special Interest Group (PCI-SIG®) defines specifications and compliance tests that guarantee the interoperability of PCIe systems. PCIe also supports different lane configurations, from x1 to x32, to increase bandwidth and performance.

Universal Chiplet Interconnect Express (UCIe) is a standard for high-speed serial communication between chiplets. Designers can combine these small integrated circuits to form larger, more complex chips.  UCIe is based on CXL / PCIe and supports the same data rates and lane configurations. UCIe enables chiplet-based designs that reduce cost, power consumption, and design complexity while increasing performance and scalability.

Double Data Rate (DDR) SDRAM is a standard for high-speed memory communication between devices and hosts, such as computers, memory modules, and graphics cards. DDR supports various data rates, from 200 Mbps (DDR) to 6400 Mbps (DDR5). DDR also supports different memory capacities, from 64 MB (DDR) to 64 GB (DDR5). DDR transfers data on the clock signal's rising and falling edges, doubling the effective bandwidth.

A chiplet is a small, modular chip that performs a specific function very well. For example, a chiplet can be a processor core, a memory block, an I/O driver, or a signal processing unit. Chiplets are designed to be used in a chiplet-based architecture, in which multiple chiplets are connected through a standardized high-speed digital interface, such as UCIe, to form a complete system-on-chip (SoC).

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