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PAM4 Design Challenges and the Implications on Test

Application Notes

Ever-increasing demands for a connected world with instant data access continues to drive Ethernet transmission innovation. Development of 100G Ethernet data transmission is currently in production and will continue to evolve. Achieving 400G Ethernet represents a significant and disruptive technological step. Technological advances towards achieving greater Ethernet speed presents two design possibilities, NRZ and PAM-4, and each comes with a unique set of challenges.

NRZ (Non-Return-to-Zero) uses a currently available technology and will continue a linear evolution from 100G (25/28G, 4 lanes) to 400G (56G, 8 lanes). From a time domain perspective, NRZ consists of 1’s and 0’s and can be referred to as PAM-2 (pulse amplitude modulation, 2-level) for the two amplitude levels that contain 1 bit of information in every symbol (Figure 1). The NRZ eye diagram (Figure 1), providing timing and voltage used to measure link performance, contains a single eye.

Since NRZ has gradually evolved over the last 50 years with improved speed from 10G to 100G, many new concepts have had to be researched and addressed. These same concepts will continue to need advanced technology to achieve the higher 400 Gb/s data rate.


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