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 Advanced Option for the Functional Interconnect Test Solutions GUI for the FITS-16CH chassis

This part number includes an advanced option for the Functional Interconnect Test Solutions GUI for the FITS 16CH chassis.

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  • Number of channels

    Independent 16 Tx and 16 Rx

  • Lane Speeds

    212.5 Gb/s, 106.25 Gb/s

  • Interface

    FEC stats, Auto-lane tuning with Keysight DCA

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Highlights

  • High-Speed MultiChannel Testing:
    • (16) independent transmit and (16) independent receive differential channels supporting 53Gb/s, 106Gb/s, and 212.5Gb/s PAM4 signaling speeds. FITS-16CH can simultaneously measure real-time BER performance on both Groups of (8) transmit (Tx) and (8) receive (Rx) channels.
    • Each group of 8 Tx and 8 Rx channels may be operated together in the same test or independently running two different tests.
  • Versatility Across Development and Manufacturing Applications: FITS-16CH is suitable for a wide range of high-speed interconnects and can be used for error performance validation in applications such as:
    • Product development and QA for pre-production fully assembled interconnects.
    • Manufacturing for sub-assembly mechanical alignment, temperature test, in-line, near-line, and end-of-line error performance validation applications.
    • FITS-16CH can connect up to two of your 1.85mm RF connector fixtures or to standard Module Compliance Boards with module controls over two GPIO interfaces. GPIO cables are included with chassis.
  • Advanced Optical and Electrical Interconnect Validation:
    • Suitable for a wide range of high-speed interconnect test applications, including 1.6T, 800GE, and 400GE interconnect standards. Media types are fully retimed optical transceivers FROs, AOCs, LROs, LPOs, active copper AECs and ACCs, and passive copper DACs.
  • Designed for test of 1.6T Ethernet interconnects:
    • Two independent groups of Chip-to-Module channels are available for testing at industry standard Ethernet signal levels up to 1 Vp-p.
  • Performance Under Challenging Conditions:
    • Designed to deliver excellent signal integrity, ensuring that even under the most difficult signaling conditions, accurate BER at all supported channels speeds, and FEC symbol error correction analysis and margin assessment for the 212Gb/s channel and other supported lanes speeds are achieved.

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