Brochures
The W2323 Design Rule Check (DRC) Element is a comprehensive MMIC and RFIC layout design rule checker from Keysight Technologies, Inc. EEsof EDA, the technology and innovation leader in high-frequency mixed-signal electronic design automation (EDA). It is integrated with Advanced Design System (ADS), the only design simulation platform that enables the co-design of IC, package, and board in high-frequency and high-speed applications. ADS seamlessly integrates system, circuit, and full 3D electromagnetic simulation with Keysight’s test instrumentation, resulting in repeatable, irst-pass electronic design success. The DRC Element is integrated with the ADS Layout Element to enable MMIC and RFIC designers to verify and correct their layouts against foundry DRC rules before tape out. This helps designers to eliminate DRC violations that can cause foundry rejection and delays. The DRC accepts foundry endorsed DRC rules, including component/cell-speciic identiication and checks on lattened and hierarchical layouts. It runs on both PC and Linux platforms; and integrates with Mentor Calibre and Cadence Assura to allow results from these 3rd party DRC tools to be viewed and corrected in the engineer’s ADS DRC environment.
The W2323 DRC Element includes:
Seamless integration with the ADS Layout Element to enable development of DRC rules, viewing of DRC results, and correction in the same layout design environment.
A complete set of standard and advanced DRC capabilities, extensible through the powerful C-like Application Extension Language (AEL) for automated checking and custom rules.
Intelligent application of cell- or component-speciic DRC rules on hierarchical and lattened layouts.
A programmable conditional selection of edge and polygon for DRC checks. – Comprehensive all-angle geometry and Boolean checking on:
The ADS DRC Element offers the best price performance in foundry endorsed DRC capabilities. It runs on both PC and Linux platforms, and displays results from ADS native, Mentor Calibre or Cadence Assura DRC checks, so the MMIC/RFIC designer can quickly ix the layout locally in ADS before inal, error-free fabrication.
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