Get the maximum bandwith and flexibility in signaling for the next big step ahead.
Shorten time to market while minimizing the risk of redesign. Manage rising design complexity and control high prototyping costs with efficient high-performance simulation tools.
Generate 1.6T signals, perform electrical and optical TX and RX characterization, and validate interconnect and network performance under realistic AI traffic conditions. This ensures signal integrity and reliable system behavior at scale.
Be on the safe side while UALink, OIF, and IEEE 802.3 standards evolve and new MSAs are developed. With Keysight's continually updated test automation solutions, you can reliably test without in-depth knowledge before the standards are complete.
Quickly ramp production while maintaining high test yield, speed, and efficiency for high throughput and lower costs.
Comprehensive, multi-platform solutions for optical and electrical validation and conformance test.
Multi-platform solutions for scaling from 800G to 1.6T
End-to-end solutions for scaling towards 3.2T
1.6T Ethernet introduces 200 to 224 Gbps lane speeds with PAM4 signaling, significantly increasing signal complexity and reducing test margins with the reduced eye heights and shorter unit intervals. Compared to 800G, this results in tighter signal integrity constraints, higher noise sensitivity, and more stringent compliance requirements.
TAI workloads depend on synchronized, high-speed communication across large GPU clusters. 1.6T testing validates that interconnects can deliver the bandwidth, latency, and reliability required for these large-scale environments.
Component-level compliance alone is not sufficient. At 1.6T, system-level testing ensures:
This is essential because a single weak link can impact overall system performance.
Complete 1.6T validation requires:
End-to-end coverage ensures faster time-to-market and reliable deployment.
Accurate calibration ensures repeatability and compliance. At 1.6T, multiple stress parameters — such as jitter, noise, and signal distortion — must be precisely controlled and balanced to match 1.6T standard and MSA speicifications.
Validating receiver performance at 1.6T requires reproducing realistic worst-case channel conditions and verifying that the receiver can accurately recover data under these stress scenarios.
Receiver validation is based on applying a calibrated stress signal to the device under test. This signal intentionally degrades the waveform to emulate real-world impairments, including:
The goal is to determine the minimum signal quality at which the receiver still meets the bit error ratio (BER) / forward error correction (FEC) targets.
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