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Description
The HMMC-5618 66 to 20 GHz MMIC is an efficient two-stage mediumpower amplifier that is designed to be used as a cascadable intermediate gain block for EW applications.
In communication systems, it can be used as an amplifier for a local oscillator or as a transmit amplifier. It is fabricated using a PHEMT integrated circuit structure that provides exceptional efficiency and flat gain performance. During typical operation, with a single 5-volt DC power supply, each gain stage is biased for Class-A operation for optimal power output with minimal distortion. The RF input and RF output has matching circuitry for use in 50 Ω environments.
The backside of the chip is both RF and DC ground. This helps simplify the assembly process and reduces assembly related performance variations and costs.
Applications
The HMMC-5618 is a GaAs MMIC medium-power amplifier designed for optimum Class-A efficiency and flat gain performance from 6 GHz to 20 GHz. It has applications as a cascadable gain stage for EW amplifier, buffer stages, LO-port driver, phasedarray radar, and transmitter amplifiers used in commercial communication systems. The MMIC solution is a cost effective alternative to hybrid assemblies.
Biasing and Operation
The MMIC amplifier is normally biased with a single positive drain supply connected to both VD1 and VD2 bond pads as shown in Figures 10 and 11. The recommended drain supply voltage is 3 to 5 volts. If desired, the first stage drain bonding pad can be biased separately to provide a small amount of gain slope control or bandwidth extension as demonstrated in Figure 2.
No ground wires are required because all ground connections are made with plated through-holes to the backside of the device.
Gate bias pads (VG1 and VG2) are also provided to allow adjustments in gain, RF output power, and DC power dissipation, if necessary. No connection to the gate pads is needed for single drain-bias operation. However, for custom applications, the DC current flowing through the input and/or output gain stage may be adjusted by applying a voltage to the gate bias pad(s) as shown in Figure 11. A negative gate-pad voltage will decrease the drain current. The gate-pad voltage is approximately zero volts during operation with no DC gate supply. Refer to the “Absolute maximum ratings” table for allowed DC and thermal conditions.
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