Optimize Power Source Integrity Under Large Load Transients
Application Notes

Optimize Power Source Integrity Under Large Load Transients

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Today’s integrated circuits are operating faster than ever. The increased operating speed can lead to highly dynamic power demand from the power supply, which poses a challenge during testing when you source power using programmable power supplies. The high-speed current waveforms can lead to voltage drops at the integrated circuit. If it is severe enough, the voltage drop can reset the microprocessor or cause anomalies in your test results. This application note explains why this voltage drop occurs and offers several ways to achieve the lowest possible voltage drop by selecting optimal load leads and power supplies and using local bypassing.