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PathWave ADS 2024 Update 1.0 Product Release
Highlights
The PathWave Advanced Design System (ADS) 2024 Update 1.0 product release includes new capabilities and enhancements for:
- Design and Technology Management
- Design Editing and Layout
- Design Import/Export
- Layout Verification
- Process Design Kits (PDK) and PDK Validator
- Data Display
- Circuit Simulation
- Quantum Electronics
- High Speed Digital (HSD)
- EM Simulation
- Power Electronics
- Electrothermal Simulation
- High Performance Computing (HPC) Design Cloud
PathWave ADS 2024 Update 1.0 is available now!
PathWave ADS 2024 Update 1.0 continues to offer the industry’s most complete RF and Microwave, High-Speed Digital, and Power Electronics design capabilities in simulation software that you’ve come to depend on. This update release includes improved accuracy and ease-of-use for RFPro EM, nonlinear circuit and electro-thermal simulation. Powerful Python programing interface enables automating AI machine learning to create neural network nonlinear circuit simulation models; and customizing all aspects of ADS workflow for optimal design efficiency and enterprise deployment.
New PathWave ADS 2024 Update 1.0 design capabilities include:
More accurate RFPro 3D-EM and 3D-Planar meshing and analysis
- EM simulation of arcs and circular structures is more accurate with increased meshing robustness.
- RFPro EM analysis is automatically setup with past settings in emSetup for robust backward compatibility.
More accurate Nonlinear Circuit Simulation, supports encrypted and AI models
- Gain compression takes into consideration nonlinear gain expansion instead of referencing to only small-signal gain. Now gain compression is computed for both small-signal and maximum nonlinear gain.
- Foundry IP-protected encrypted models previously only for GoldenGate can now be used seamlessly.
- Keysight Artificial Neural Network (ANN) model generated from Python AI training for use in nonlinear circuit simulation.
Electrothermal (ETH) enhancements for multi-technology and ease-of-use
- ETH Floorplanner now supports nested technology, SmartMount and encrypted thermal tech-files.
- Dynamic ETH sweeps for transient and circuit envelope are now managed within ETH for improved ease-of-use.
Custom automated workflow with expanded Python application programming interfaces (APIs) and Python virtual environments
- Python console accessible from within ADS to customize workflows and modify workspaces programmatically.
- Keysight Artificial Neural Network (ANN) Python modeling interface for training AI nonlinear circuit model with measured, simulated or graphical data.
Design and Technology Management
- The Python console enables users to develop Python scripts to control workflow, modify workspaces, automate design tasks, and customize the user interface.
- Python virtual environments can be used to manage added Python modules in the ADS environment.
- Customize Python-based pcell dialog box for pcell evaluation and automated artwork macros.
- New Python APIs for accessing the Keysight Artificial Neural Network (ANN) module for nonlinear circuit modeling.
- Unarchive Workspace now creates a new directory as the workspace destination if the specified directory does not exist.
Design Editing and Layout
- Minimized mouse clicks (e.g., the Property Editor and Info panels now open by default for new ADS installations on the right side of Layout and Schematic windows).
- The 'Edit Component Parameters...' dialog panel now supports editing of parameter values for multiple components simultaneously.
- Improved editing behavior for pins, padstacks, nets, connectivity and SmartMount instances.
- The Smart Mount instances from different technologies can be directly stacked on one another in the same top-level design for multi-technology assembly, such as IC on Package.
- The Smart Mount Editor visualizes the placement of Smart Mount instances to specify the stacking and mounting parameters for error-free RF module assembly.
- New AEL functions are added for pin, cellview and schematic simulation manipulation to enhance workflow automation.
Design Import/Export
- New ADS Board Link (ABL) functions for easier identification of layout for import/export.
- New AEL functions to export Drill and Gerber formats with settings to configure all supported options.
- Documented ABL export AEL functions for easier usage.
Layout Verification
- Design Rule Checker (DRC)
- DRC performance improvements for designs with circles.
- 6 New DRC rules for precise polygon selection.
- Electrical Rule Check (ERC)
- ERC Device Temperature from an electro-thermal (ETH) simulation highlights equivalent schematic and layout components.
- ERC Device Temperature from an electro-thermal (ETH) simulation highlights equivalent schematic and layout components.
- Layout Versus Schematic (LVS)
- LVS Commands are optionally used to configure LVS device-specific behavior such as identifying whether a cell is primitive or not.
- LVS Commands are optionally used to configure LVS device-specific behavior such as identifying whether a cell is primitive or not.
Process Design Kits (PDK) and PDK Validator
- DemoKit mmWave
- Updated device recognition LVS rules.
- Supports temperature variation in RFPro simulation by including conductor temperature coefficients in the material database file.
- Statistical variation support to FETs and passives.
- Supports electrothermal (ETH) simulation in Smart Mount multi-technology flow with updated thermal properties in material database.
- DemoKit Non-Linear
- Updated device recognition LVS rules.
- PDK Validator
- PDK Validator dialog shows green test status if all tests run without errors. Notes are now displayed in a separate column for easier troubleshooting.
Data Display
- Dark Mode option applies dark background theme for all data display windows to satisfy popular requests.
- Plot Legends and Marker Readouts now support background color and fill pattern settings.
- Python Data-Display Automation module enables creation and opening of data display files programmatically.
Circuit Simulation
- Gain compression takes into consideration nonlinear gain expansion instead of referencing to only small-signal gain. Now gain compression is computed for both small-signal and maximum nonlinear gain.
- Foundry IP-protected encrypted models previously only for GoldenGate can now be used seamlessly.
- Keysight Artificial Neural Network (ANN) model generated from Python AI training for use in nonlinear circuit simulation.
- New Models
- ASM-HEMT model version 101.4
- HiSiM_HV model version 2.5.1
- HiSIM_HV model version 2.4.1, 2.4.2, 2.4.3
- MVSG GaN model version 3.2.0
- Support for standard spectre-format instance parameters to enable electrothermal analysis flow for Verilog-A-based built-in HiSim_HV models.
- Enhanced time-domain data import via timefile() and modfile() functions with ability to resample and filter incoming data.
Quantum Electronics
New QuantumPro EDA is now available in ADS 2024 Update 1.0 to enable:
- Faster quantum chip development with:
- Integrated circuit/layout/EM qubit simulation.
- Quantum-specific layout library.
- Fast EM simulation with the Method of Moments (MoM).
- Parametric analysis for fast iteration.
- Automatic quantum parameter extraction.
- Built-in design automation using ADS/QPro scripting.
- Greater confidence.
- Multiple EM solvers (MoM, and FEM).
- Cross-checking quantum parameter extraction using
- Freq-Domain Extraction: It will show the coupling terms only between neighboring qubits and resonators.
- Eigenmode Extraction: It will show the coupling terms even between distant qubits and resonators.
- Modeling of the kinetic inductance in the EM flow.
- Lower knowledge barrier for microwave engineers to begin quantum design.
- Quantum Layout library expanded with 6 new components:
- Q_CpwLineShorted
- Q_CpwCouplerMultilayer
- Q_TransmonPocket6
- Q_TransmonPocketSingleIsland
- Q_Via
- Q_Bump
- Quantum Multi-Layer Technology Wizard enables creation of multilayer quantum chips with through vias and top layer flip with metal bumps.
High Speed Digital (HSD)
- New Chiplet PHY Designer allows users to simulate the Chiplet physical layer with UCIe standards.
- 10x speedup in loading complex designs into SIPro and PIPro.
- AMI workflow supports PAMn measured data.
- PCIe simulator supports Seasim Interface.
- Subset S-param data by terminating other ports with user-specified impedance.
- Memory Designer transient simulation accuracy and speed with AI/ML worst case bit pattern generation.
- Memory Designer S-parameter toolkit enhanced with complex termination port reduction file saving.
- Causality enforcement by default for SI and DDR analysis to enhance simulation accuracy and convergence.
EM Simulation
- RFPRo
- Faster 2nd Generation Momentum and FEM solver for faster, higher capacity EM simulation.
- EM simulation of arcs and circular structures is more accurate with increased meshing robustness.
- RFPro EM analysis is automatically setup with past settings in emSetup for robust backward compatibility.
- Supports non-reciprocal S-parameter and RLC lumped components.
- Export RFPro and SIPro view to EMPro for FDTD time-domain 3DEM analysis.
Power Electronics
- New compensator models added: Type 1 (Integrator), Type 2 & Type 3.
- New feature to store Near field and Far field data for user-specified frequency plans.
- New example for 3D Power Module simulation.
Electrothermal (ETH) Simulation
- ETH Floorplanner now supports nested technology, SmartMount and encrypted thermal tech-files.
- Dynamic ETH sweeps for transient and circuit envelope are now managed within ETH for improved ease-of-use.
- ERC (Electrical Rule Check) supports device temperatures from an electro-thermal (ETH) simulation by highlighting equivalent schematic and layout components.
High Performance Computing (HPC) Design Cloud
- Electrothermal (ETH)
- Dynamic (i.e., Circuit Envelope and Transient) ETH circuit simulation are now supported.
- Static (i.e., DC and Harmonic Balance) swept ETH circuit simulation are distributed for fast simulation.
- Single and Parallel jobs can be performed.
- ETH re-use options are also supported.
- W3059E PathWave HPC Accelerator.
- RF/Microwave
- Circuit Simulation direct job submission to distributed systems or clusters such as LSF and Slurm without need to install additional software components.
- User-compiled models and AEL measurement expression functions are directly supported with no additional upload file required.