Pushing the Speed Envelope for Memory System Designs
Webinars
Memory interface speeds keep increasing to meet performance demand. For instance, DDR5 is 275% faster than DDR4, reaching 8800 MT/s or more. But higher speeds also complicate memory design and validation. To achieve the next memory standard, designers need a connected workflow that streamlines time-to-insight from concept to simulation and test.
In this webinar, you will learn from industry experts:
- Best practices pathfinding for complex modulation interfaces.
- Compensate for signal degradation with Decision Feedback Equalization.
- Optimize timing at higher frequencies by analyzing key sources of jitter.
- Improve analysis accuracy using probe models to account for equipment loading effects