How to Optimize a PIN Photodetector Model for a Silicon Photonics Foundry Process

+ Electronic Design Automation

Customize Models For Foundry Processes

Optimizing a positive-intrinsic-negative (PIN) photodetector model requires an accurate representation of both semiconductor behavior and layout-induced parasitics. Set up an alternating current (AC) small-signal simulation with the photodetector, parasitic components, bias voltage, load resistance, and optical input, then import empirical device data over the corresponding frequency range.

Compare simulated and measured response and optimize the variables responsible for the mismatch. Candidate parameters include parasitic capacitance, inductance and resistance, series resistance, junction capacitance, and drift- and diffusion-related variables. Verify the optimized parameters under multiple bias conditions while holding parasitic variables fixed and allowing appropriate photodetector variables to change with bias.

Optimize The Photodetector Model Solution

Perform the test by comparing an AC small-signal photodetector simulation with measurement data from a fabricated device and optimizing the model parameters that produce discrepancies. Keysight Photonic Designer provides a template silicon photonics process design kit (PDK) containing physics-based models for optical and electro-optical components. The PIN photodetector model represents semiconductor properties as well as practical layout parasitics such as vias and metal pads. Optimization can adjust parasitics, series resistance, junction capacitance, and drift- and diffusion-related parameters within realistic ranges to correlate simulation with empirical data. Multi-scenario verification can then evaluate the optimized model across different reverse-bias conditions.

Get Quote