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Highlights

Compute Express Link (CXL) is an industry supported, high-speed interconnect standard that enables coherent memory access between a host and end-point device. CXL leverages the dependability and performance of the PCI Express® physical layer and uses a flexible processor port to auto-negotiation whether the link will communicate using the standard PCIe protocol or the supported alternate CXL transaction protocol. CXL defines three sub-protocols CXL.io, CXL.mem, and CXL.cache that are used for initialization and link-up, and to facilitate the coherent sharing of memory between computing devices.

 

P5561CXLA CXL 1.1 / 2.0 Protocol Exerciser Software supports protocol traffic generation for all CXL 1.1 and 2.0 supported speeds and lane widths from x1 to x16. The CXL exerciser can emulate a root port or endpoint, generate FLIT traffic and includes built-in LTSSM test cases, error insertion, and a protocol checker. The P5561CXLA software is used with the P5573A/74A/75A series of protocol exerciser hardware which is designed to be easy to setup, connect, and quickly configured to bring up the CXL link and check LTSSM and protocol functionality.

  • Supports CXL 1.1 and 2.0 specifications for data rates up to 32 GT/s
  • Generate traffic on link widths of x1, x2, x4, x8, x16
  • Emulate a CXL host or any of the three CXL endpoint device types
  • Generate CXL.io, CXL.mem, and CXL.cache transaction sub-protocols
  • Protocol error checking
  • Automated Link training with speed change skip and bypass support
  • Support for Alternate Protocol
  • Over 100 predefined LTSSM test cases
  • Error insertion
  • Combined Analyzer and Exerciser Software GUI
  • Full featured API supporting Python, C++, and C#
P5561CXLA

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Featured Resources

Application Notes 2022.12.12

Compute Express Link (CXL): A New Coherency Protocol Over PCIe

Compute Express Link (CXL): A New Coherency Protocol Over PCIe

CXL Educational Application Note

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