On-Demand
Engineering at the Edge Webinar Series - Episode 1
Data rates have doubled, but validation methods have not kept pace. As PCIe, DDR, and multi-terabit optical interconnects evolve, engineers are encountering signal integrity challenges much earlier in the design process.
Join Niels Fache, Senior Vice President and General Manager of Design Engineering Software at Keysight, to explore where validation becomes more challenging as speeds increase, and how engineering teams are adapting. You’ll learn how simulation, architecture modeling, and high-fidelity measurement help validate designs before silicon exists and reduce downstream risk.
Engineers working on high-speed digital designs such as PCIe, DDR, and optical interconnects should attend. This session suits design and validation teams focused on signal integrity and pre-silicon verification.
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