Automation
- Integrated receiver test calibration automation for JBERT Bit Error Ratio Tester available as an option
- Test setup wizard guides you through test selection, configuration, connection, execution, and results reporting
- Measurement connection setups are displayed, and oscilloscope setup is automatically configured for each test
- Test results report documents test configuration, measurements made, pass/fail status, margin analysis, and waveforms, and a switching solution is available for automated multilane testing
Standards supported
- PCI Express® 1.0, 1.1, 2.0, and 3.0 tests
- Wide-range of electrical tests are performed, significantly more than SigTest
- Consistent results with Sig Test for 1.0a, 1.1, and 2.0 analysis
- Supports de-embedding of test fixtures and cables with the optional InfiniiSim Waveform Transformation Toolset
Requirements
- PCI-SIG® compliance test fixtures
- Serial Data Analysis
- InfiniiSim Waveform Transformation Toolset (optional)
- PrecisionProbe oscilloscope cable and probe correction (optional)
Extensibility
- Use the User Defined Application tool (www.keysight.com/find/uda) to:
- Create and fully integrate custom tests, configuration variables, and connection instructions
- Insert external application calls into the run sequence, such as MATLAB scripts or your device controller
- Configure additional external instruments used in your test suite
The PCI Express electrical performance validation and compliance software provides you with a fast and easy way to verify and debug your PCI Express designs. The PCI Express electrical test software allows you to automatically execute PCI Express electrical checklist tests, and it displays the results in a flexible report format. In addition to the measurement data, the report provides a margin analysis that shows how closely your device passed or failed each test.
The PCI Express electrical test software includes a test for verifying that your transmitter is compliant with the PCI Express 3.0 BASE specification at 8 GT/s and includes new uncorrelated jitter tests; it calculates de-emphasis and preshoot values for specified de-emphasis presets and updated reference clock tests.
The PCI Express electrical test software also utilizes the Q-domain + Dual Dirac method for jitter separation described in the PCI Express 2.0 Card Electromechanical specification. This ensures that your Gen2 measurements will have absolute consistency with measurements made using the PCI-SIG’s standalone SigTest software. In addition, for Gen1 measurements, the software optionally utilizes the clock recovery method used in the official PCI-SIG Signal Quality Test Methodology ("SigTest") application, ensuring that your test results are consistent with results from the SigTest application. For PCI Express 3.0 measurements, the software incorporates new algorithms for calculating PCIe 3.0 specific parameters* including:
- TX unit interval
- Full swing TX voltage with no TxEQ
- Minimum swing during EIEOS for full swing
- TX uncorrelated total jitter
- TX uncorrelated deterministic jitter
- TX uncorrelated pulse width jitter
- TX deterministic DjDD uncorrelated pulse width jitter
- TX pseudo package loss
- De-emphasis and preshoot measurements for TXEQ presets
- TX DC common mode voltage
- TX AC common mode voltage – 4 GHz, 300 KHz to 500 MHz
- TX absolute delta of DC common mode voltage
- TX absolute delta of DC common mode voltage during L0 and idle
In addition to supporting PCIe 3.0 measurements, the PCI Express electrical performance validation and compliance software performs a wide range of electrical tests as per the PCI Express 1.0a, 1.1*, and 2.0 electrical specifications for new silicon, add-in cards, and motherboard systems as documented in section 4 of the base specification and section 4 of the Card Electromechanical specification. The software also includes tests for PCI Express 2.0* to help provide you with the most accurate, automated test software for Gen2 PCI Express measurements. In addition to full swing (800 mV) testing, the software also supports testing for low-power, half-swing devices (400 mV) as per the PCI Express Architecture Mobile Graphics Low-Power Addendum to the PCI Express Base Specification Revision 1.0.
The software can optionally support automated setup of the JBERT bit error ratio tester and 81150A Pulse Function Arbitrary Noise Generator for PCIe 3.0 BASE spec receive testing. The PCIe 3.0 specification requires the use of a receiver equalizer in a PCIe 3.0 compliant device. This option along with your JBERT receive test equipment and accessories provides a fast, automated way to set up the jitter and noise cocktail used to create the stressed voltage and jitter test signals used in receiver stress testing. Using this automated tool can save you hours of manual set up and helps to ensure test consistency over time.
The PCI Express electrical performance validation and compliance software requires the high-speed serial data analysis software, one of the PCI-SIG approved compliance test fixtures (CBB2 or CLB2), a select Infiniium oscilloscope, and at least two SMA/SMP cables or InfiniiMax active differential probes. Some of the measurements cannot be made with the PCI-SIG compliance test fixtures and may require you to build or acquire a custom test fixture.
