Wafer Prober Plug-in for Test Automation on PathWave

Introduction

The Keysight Test Automation on PathWave (TAP) software provides powerful, flexible and extensible test sequence and test plan creation with additional capabilities that optimize your test software development and overall performance. The Wafer Prober Plug-in supports your workflow automation for integrated and Silicon Photonics wafer probing and test.

Keysight TAP is a modern Microsoft .NET-based application that can be used stand-alone or in combination with higher-level test executive software environments. Leveraging C# and the power of Microsoft Visual Studio, TAP is not just another programming language. It’s a platform upon which you can build your test solutions, maximizing your team’s productivity by using your existing software development tools and infrastructure.

Architecture

Included with Keysight TAP is the core sequencing engine, tools and plug-ins to minimize your test system development time and test execution speed. Instrument plug-ins provide test steps that can be added to work-flow sequences without needing to use instrument level programming commands. 

The N7700210C Wafer Prober Plug-in further simplifies automation by handling the interface to the Formfactor semi-automated probe station hardware and Formfactor Velox and Silicon Photonics Tools software. Test steps realize wafer chuck movement and probe positioning and alignment tasks within a test plan and can be combined with instrument test execution steps. The wafer prober settings needed for positioning and RF and optical probe configuration are provided in the test steps for easy configuration.

Features

The Keysight Wafer Prober TAP Plug-In supports integrated photonics test workflow for both wafer and singularized die testing by:

1. Data ingress for wafer structure, device coordinates, device parameters and test conditions based on .csv and .xml files

2. Prober hardware setup for configuring the probe station for array & single fiber probes, edge & surface coupling, RF & DC electrical probes and probe orientations

3. Test steps that combine common probe station commands for prober and probe control and prober status inquiry

4. Communication to probe station and to other instrument plug-ins for test execution, test set-up and instrument conditioning, and result management

The N7700210C Wafer Prober TAP Plug-in simplifies automation by providing easy-to-use measurement steps for the Formfactor probe station that handle all the details for configuring the CM300xi silicon photonics probe station and Formfactor Velox and Silicon Photonics Tools software.

Operation

Tunable lasers, Lightwave Component Analyzer and optical power meters are connected to the device input and output ports via polarization synthesizers and optical switches. The optical switches route the optical test signals to and from different ports of the fiber array the test instruments. The detector connected to the LogAmp serves for the active alignment of the optical fibers to the device under test (DUT). RF and DC probes connect to the electrical ports of the integrated photonics device.

An integrated photonics test plan typically consists of a combination of test execution steps for:

• Controlling the probe station for moving the wafer chuck and the optical and electrical probes to the device to be tested on the wafer or die. 

• Configuring signal routes between the instruments and the optical and electrical probes to device I/O ports.

• Performing measurements by first stepping the wafer and probes to the device IO ports, performing automated alignment for optimum coupling and then triggering a measurement.

• Measurement steps automatically pull geometric and position information about the optical and electrical device ports on wafer or die from the wafer and device data base and the corresponding test conditions from the measurement plan.

Configuring the workflow with sequences of steps and coordination with other instruments and resources using TAP is a powerful contribution to enhancing efficiency in test development and throughput.