Webinar
Scaling AI compute requires more than improving accelerator performance. It increasingly depends on efficient data movement across compute, memory, and supporting resources.
In the first technical session of our three-part AI Scale-Up Insider Series, discover how PCI Express® (PCIe®), UALink, and advanced memory are reshaping AI infrastructure, and why these advances introduce new signal integrity, compliance validation, and interoperability requirements.
Development and validation engineers, data center architects, and technical leaders working in AI infrastructure, compute I/O, memory, fabric, signal integrity, and system validation. This session is especially relevant to those responsible for designing, integrating, or validating the high-speed components, interfaces, and interconnects that enable AI system scale-up.
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