Modular Systems

Applications

• Transportable applications (can also be rack-mounted)

Functionality

• 2 slots for AXIe instrument modules
• Embedded AXIe system module
• High Power, 200W Cooling per slot

Performance characteristics

• Gigabit LAN connection to each module slot
• Gen 2 PCIe x8 interface to system controller provides up to a 4 GB/s data rate from external controller
• Gen 2 PCIe x4 links to each module slot (maximum 2 GB/s data rate)

The M9502A AXIe Chassis is fully compatible with the AXIe 1.0 specification. It includes an embedded system module (ESM) that does not take up an instrument slot. This system module performs the chassis management functions contained in the AXIe specification. Additionally, it provides PCI and LAN interfaces for connection to an external computer, external clock and trigger connectors, and Keysight-exclusive, inter-chassis synchronization connectors. The local bus implemented in the M9502A provides the maximum 62 pairs allowed by the AXIe specification. Combine the M9502A with the M9048A PCIe Desktop Adaptor to achieve the highest system bandwidth.

The M9502A is perfect for transportable applications that require a higher performance of AXIe. It can also be installed in a rack and the instrument modules slots are arranged horizontally to minimize rack space. This arrangement combined with a high-performance cooling system allows the chassis to be racked in only 2U of space. The M9502A is also designed to be easily maintained as both the power supply and fan tray can be removed while the chassis remains in the rack.

Applications

• Transportable applications (can also be rack-mounted)

Functionality

• 5 slots for AXIe instrument modules
• Embedded AXIe system module
• High Power, 200W Cooling per slot

Performance characteristics

• Gigabit LAN connection to each module slot
• Gen 2 PCIe x8 interface to system controller provide up to a 4 GB/s data rate from external controller
• Gen 2 PCIe x4 links to each module slot (maximum 2 GB/s data rate)

The M9505A AXIe Chassis is fully compatible with the AXIe 1.0 specification. It includes an embedded system module (ESM) that does not take up an instrument slot. This system module performs the chassis management functions contained in the AXIe specification. Additionally, it provides PCI and LAN interfaces for connection to an external computer, external clock and trigger connectors, and Keysight-exclusive, inter-chassis synchronization connectors. The local bus implemented in the M9505A provides the maximum 62 pairs allowed by the AXIe specification. Combine the M9505A with the M9048A PCIe Desktop Adaptor to achieve the highest system bandwidth.

The instrument modules slots are arranged horizontally to minimize rack space. This arrangement combined with a high-performance cooling system allows the chassis to be racked in only 4U of space. The M9505A is also designed to be easily maintained as both the power supply and fan tray can be removed while the chassis remains in the rack.

• random level interference with crest factor > 4
• sinusoidal level interference
• common mode and differential mode
• bandwidth adjustable up to 32 GHz
• four differential output channels to avoid baluns
• adjustable amplitude up to 1 Vpp (single-ended), 2 Vpp (differential)
• 1-slot AXIe module for combined configurations with M8040A high-performance BERT
• graphical user interface and remote control via M8070B system software for M8000 series of BER test solution

The Keysight M8054A interference source generates repeatable and accurate level impairments for testing high-speed digital receivers that support symbol rates up to 64 Gbaud.

The target application is receiver test for devices with PCIe® 4/5, OIF CEI-56G, IEEE 802.3 bs, bj, cd, by, SAS, and other high-speed digital interfaces.

Repeatable and Accurate Results with M8040A

The M8040A high-performance BERT provides clean NRZ and PAM4 signals up to 64 GBaud with fast transitions and low intrinsic jitter. The remote head concept of M8040A with the short 1.85 mm cables brings the performance close to the device under test, minimizing signal degradations caused by lossy channels.

• Data rates from 2 to 64 GBaud PAM4 signal
• True PAM4 error detection in real-time up to 58 GBaud
• Built-in de-emphasis, analyzer equalization, and clock recovery
• Integrated and calibrated jitter injection: RJ, PJ1, PJ2, SJ, BUJ, and clk / 2 jitter
• Two pattern generator channels per module to emulate aggressor lane
• Interactive link training and SKP OS filtering for 8 / 16 / 32 / 64 GT/s PCI Express®
• Algorithmic PRBS, QPRBS, and memory-based patterns, pattern sequencer
• For PAM4, gray coding, FEC encoding, and precoder and error distribution analysis
• All options and modules are upgradeable
• Offers true error analysis and provides repeatable and accurate results, optimizing the performance margins of your devices

Target Applications

The M8040A is designed for research and development engineers and test engineers who characterize chips, devices, transceiver modules and sub-components, boards, and systems with serial I/O ports operating with data rates up to 32 GBaud and 64 GBaud in the server, computing, data center, and communications industry.

The M8040A can be used for receiver (input) testing for many popular interconnect standards that use PAM4 and NRZ data formats such as: PCIe 6.0 / 5.0 / 4.0, TBT3, 400 GbE, 50 / 100 / 200 / 400 / 800 GbE, OIF CEI-56G, and CEI-112G, 64G/112G Fibre Channel, Infiniband-HDR, and proprietary interfaces for chip-to-chip, chip-to-module, backplanes, repeaters, and active optical cables.

The pattern generator of the M8040A GBaud BERT provides a clean 32 and 26.5625 GBaud PAM4 output signal.

• Symbol rates from 2 to 120 GBd
  
• Support for non-return-to-zero (NRZ), PAM3, PAM4, PAM6, and PAM8 line coding
  
• Built-in seven tap de-emphasis for improved channel loss compensation
  
• Transition time at < 5 ps and < 100 fs root mean square (RMS) intrinsic random jitter
  
• Jitter injection integrated and calibrated for receiver tolerance testing RJ, PJ1, PJ2, BUJ, sRJ, clk / 2
  
• Error Analysis up to 64 Gbaud PAM4 in real-time with integrated clock recovery and powerful equalization
• Flexible solution with software license upgradeable functionality
  

Target Applications

The M8050A helps engineers design and characterize chips, devices, transceiver modules, sub-components, boards, and systems. Quickly test serial I/O ports operating at data rates up to 120 GBd across the server, computing, data center, and communication industries. Combining the M8050A BERT with a Keysight UXR-Series 80 GHz oscilloscope gives you a full 1.6T receiver and transmitter test solution to assess your Ethernet systems.

J-BERT M8020A High-Performance BERT

The high-performance Keysight J-BERT M8020A enables fast, accurate receiver characterization of single- and multi-lane devices running up to 16 or 32 Gb/s.

With today’s highest level of integration, the M8020A streamlines your test setup. In addition, automated in situ calibrations of signal conditions ensures accurate and repeatable measurements. Through interactive link training, it can behave like the link partner of your device under test. The J-BERT M8020A will accelerate insight into your design.

Target Applications

The M8020A is designed for research and development engineers and test engineers who characterize and verify compliance of chips, devices, boards, and systems with serial I/O ports up to 16 Gb/s and 32 Gb/s. The M8020A can be used to test popular serial bus standards, such as PCI Express, USB, MIPI M-PHYTM, SATA/SAS, DisplayPort, SD UHS-II, Fibre Channel, memory buses, backplanes, repeaters, active optical cables, Thunderbolt, 10 GbE, 100 GbE (optical and electrical), SFP+, CFP2/4 transceivers, and CEI.

• Data rates up to 8.5/ 16 Gb/s for pattern generator and error detector
• Expandable to 32 Gb/s with M8062A, 32 Gb/s BERT front-end
• Integrated and calibrated jitter injection: RJ, PJ1, PJ2, SJ, BUJ, sinusoidal interference (common-mode and differential-mode), SSC (triangular and arbitrary, residual)
• 8-tap de-emphasis (positive and negative) up to 20 dB
• Integrated and adjustable ISI for loss emulation
• Interactive link training for SAS-3, USB 3.0/3.1 and PCI Express supporting 8 GT/s and 16 GT/s
• Interactive TxEQ training for IEEE 10GBASE-KR, 25GBASE-KR, and 100GBASE-KR4
• Built-in clock data recovery and equalization
• System integration with M8070A software for M8000 BER series
• Seamless operation with BERT/scope and arbitrary waveform generators

Applications

• Aerospace and Defense
• Communications
• Electronics test
• High-energy Physics

Functionality

• 5 slots for AXIe instrument modules
• Embedded AXIe system module
• High Power, up to 300W Cooling per slot
• Optional GPS synchronization and time stamping
• Optional integrated backside controller for digitizers (M9506A-BC1), enabling secure SCPI over LAN functionality

Performance characteristics

• Configurable, dual-port Gen 3 PCIe interface for connecting the chassis to an external controller and/or interconnecting multiple chassis (up to 16 GB/s data rate depending on configuration)
• Gen 3 PCIe x16 links to each module slot (maximum 16 GB/s data rate)
• Thunderbolt^TM 3 interface provides an alternative connection to a Thunderbolt-equipped laptop or desktop computer

The Keysight M9506A is a high-performance AXIe chassis and is the best choice for demanding, modular applications. The chassis is compliant with the AXIe 1.0 Rev 3.0 Wide-AXIe specification. It provides 5 slots for AXIe instrument modules, up to 300 watts per slot, and includes an embedded system module that does not take up an instrument slot. The embedded system module (ESM) provides a Gen 3 x8/x16 PCIe® interfaces for connecting the chassis to an external controller or expanding the system using multiple chassis. To minimize rack space, the instrument module slots are arranged horizontally. The chassis is the quietest AXIe chassis available with its new cooling design.

The M9506A-BC1 options adds a closed, instrument-grade, Linux-based controller to the back of the M9506A chassis. It was developed to enhance security for high channel count digitizer applications, bringing the ease of use of traditional benchtop together with the benefits of a modular platform. A simple LAN connection gives you easy SCPI based control of many channels in a small space.

The M9506A-GPS option adds GPS synchronization ability along with an external antenna port on the front panel. It provides an accurate 1 PPS output and the 10/100 MHz reference can be locked to this clock. The PPS signal can be propagated to trigger I/O and trigger events can be timestamped. Other GPS information is also provided including latitude, longitude, and altitude.

• Emulate a wide range of channel loss from approximately 4 to 26 dB with Inter Symbol Interference (ISI) traces for accurate and repeatable receiver characterization
• Six traces with 1.85 mm connectors suitable for symbol rates up to 64 GBd (M8067A-001 and -002, each with three trace pairs per board)
• Six traces with 1.0 mm connectors suitable for symbol rates up to 120 GBd (M8067A-003, -004, and -005, each with two trace pairs per board)
• Small size, mechanical brackets for vertical and horizontal placement on test bench help to minimize electromagnetic susceptibility
• Individual s-parameters download simplifies accurate embedding in test environment
  • Download the M8067A s-parameters at the Keysight support portal
    

Emulate channel loss for accurate and repeatable receiver characterization up to 64 GBd and 120 GBd.

The M8067A ISI channel boards can be used to emulate a wide range of channel loss for characterizing high-speed digital receivers that are used in server and datacenter network interfaces. The ISI channel boards are designed to be used to emulate channel loss for symbol rates up to 64 GBd and 120 GBd. A choice of twelve PC board traces with different lengths can be inserted into the signal path.

Target applications

• Emulate channel loss for receiver tolerance testing for:
  • PCI Express 6.0 and 7.0 (64 and 128 GT/s)
  • OIF CEI-112G and - 224G electrical interfaces
  • IEEE 802.3ck and 802.3dj Ethernet backplanes, cable and chip-to-chip, chip-to-module interfaces

See the Real Performance of Your Design

• Extend the back channel reach up to 37 dB at 32GBd for non-return-to-zero (NRZ) signals and up to 28 dB at 32GBd for PAM4 signals.
• Ensure reliable data transmission with continuous time liner equalization (CTLE) and linear output driver.
• Perform high-speed digital communication tests efficiently by integrating with Keysight M8070B software.
• Control and power via the USB-C.
• Target applications are PCI Express^®, cache coherent interconnect for accelerators (CCIX), SAS, Optical Internetworking Forum Common Electrical (OIF CEI), and IEEE 802.3.
• Experience maximum specified 32 GBd rate.

The Keysight M8047C redriver enables the testing of devices with back-channel losses exceeding the equalization capabilities of the used error detector. Through a continuous-time linear equalizer and a linear output driver, equalize and boost the signal to the error detector. Operate with NRZ and PAM4 signals at speeds up to 32 Gbaud. The M8047C complements the built-in equalization of the Keysight M8041A, M8051A, M8046A, and M8043A error detectors.

The M8047C redriver can be controlled via the Keysight M8070B system software for BER test solutions and a M8047C module driver.

The Keysight M8053A interference source provides the bandwidth needed for 224 Gbps in data centers and future-generation testing for PCIe^®. It supports random-level interference and sinusoidal-level interference simultaneously for optical receiver stress tests. Features include the following:

• Common mode and differential mode sinusoidal interference (CMSI, DMSI), two-tone bandwidth adjustable up to 64 GHz
• Two channels with 64 GHz bandwidth and differential outputs
• Adjustable amplitude up to 1.25 V s.e.
• 2-slot AXIe module for combined configurations with M8050A high-performance BERT
• Graphical user interface and remote control via Keysight M8070B system software for M8000 series of BER test solution
• Coupler pair for injecting the interference signal into a differential pattern stream
  

The target application is a receiver test for devices with 1.6T data center applications, future generations of PCIe, and other high-speed digital interfaces.

• emulate a wide range of channel loss with Inter Symbol Interference (IS) traces with fine resolution
• three ISI boards with five short (1.4 inch to 5.5 inch), nine medium (0.8 inch to 7.95 inch) and seven long traces (9.05 inch to 22.25 inch); traces can be cascaded
• Rogers 4350B and Megtron 6 PC board material with known S21 parameters
• differential channels
• suitable for symbol rates of 32 Gbaud and higher
• small size

The M8049A ISI channel boards can be used to emulate channel loss in receiver test setups. The boards are used to emulate channel loss for data rates of 32 Gb/s and higher. A choice of 21 PC board traces with different lengths can be inserted into the signal path. The trace lengths range from 0.8 inch (20.3 mm) to 22.3 inch (566.4 mm). By cascading the traces within one board or with another board, a wide range of channels can be emulated with very fine resolution of insertion loss steps. With their small size the ISI channel boards can be located closely to the device under test.

The M8049A ISI channel boards are complemented by the M8020A integrated adjustable ISI feature, the M8048A ISI channels for data rates up to 16 Gb/s, and dedicated compliance channels for SATA (N4915-60001), DisplayPort (N1915A-006), PCI Express® 3.0 (N4915A-014).

Target applications:
Receiver test for devices with PCIe® 4/5, OIF CEI-56G, IEEE802.3 bs / bj / cd / by, SAS, and other high-speed digital interfaces.

• expands data rate of J-BERT M8020A up to 32.4 Gb/s
• fully integrated capabilities for higher data-rate testing
• integrated adjustable inter symbol interference (ISI) helps engineers quickly test over a large range of channel loss without moving cables
• integrated analyzer equalization ensures accurate BER measurements by opening eyes in the looped-back channel
• integrated 8 tap de-emphasis allows engineers to emulate transmitter operation and de-embed test setups
• improved efficiency and accuracy for 100G and beyond testing
• interactive TxEQ training for 25GBASE-KR and 100GBASE-KR4
• control from J-BERT M8020A high-performance BERT

The M8062A 32 Gb/s module expands the J-BERT M8020A high-performance BERT with versatile generator and analyzer functionality at data rates up to 32.4 Gb/s. The newly integrated capabilities streamline testing for research and development engineers and test engineers who need to characterize devices and systems for next-generation data center and long-haul communication applications. Fully integrated capabilities like inter symbol interference generation, clock data recovery, and analyzer equalization greatly improve device characterization and compliance testing and simplify test setups. The M8062A is a 2-slot AXIe module that can be controlled via USB through the integrated user interface of the J-BERT M8020A or through remote programming commands to allow test automation.

Application examples for M8062A:

• optical transceivers such as 100GBASE-LR4, -SR4 and -ER4, 32G Fibre Channel
• SERDES and chip-to-chip interfaces such as OIF CEI
• backplanes and cables such as 100GBASE-KR4 and -CR4
• SAS-4 receiver testing
• Thunderbolt 20G and active optical cables