Validating 1.6T Interconnect Error Performance
Solution Briefs
As AI and data center networks advance to 800 Gigabit Ethernet (800GE) and 1.6 Terabit Ethernet (1.6T), validating high-speed interconnects requires more than physical-layer compliance testing. Organizations that design, develop, manufacture, integrate, or deploy these technologies must characterize real-world error performance across every electrical and optical lane—from components and subassemblies through fully assembled products—to reduce risk, improve interoperability, and ensure long-term reliability.
The brief organizes this challenge around four key principles: BER alone is insufficient for PAM4; production networks demand performance well beyond standards-based limits; interconnects must be tested both standalone and with networking equipment; and validation must extend to the system level under stressed, live-use conditions.
Keysight Functional Interconnect Test Solutions FITS-8CH provides eight independent transmit (Tx) and eight independent receive (Rx) channels for simultaneous Bit Error Ratio (BER) and Forward Error Correction (FEC) testing of PAM4 interconnects at 53 Gb/s, 106 Gb/s, and 212.5 Gb/s electrical lane speeds. Designed for 400GE, 800GE, and 1.6T applications, FITS-8CH supports fully retimed optical transceivers, Active Optical Cables (AOCs), Active Electrical Cables (AECs), evaluation boards, silicon devices, and high-speed connectors.
The system measures per-lane BER, pre-FEC BER, post-FEC BER, FEC overhead and margin, FEC symbol-error distribution, maximum symbol errors per codeword, frame loss ratio, and block error ratio (BLER). It also supports PRBSQ patterns, simultaneous multi-lane analysis, crosstalk identification, long-duration testing, and CMIS programming and digital optical monitoring. A Windows 11 graphical user interface provides real-time results, user-defined pass/fail thresholds, graphs, reusable configurations, and PDF or CSV reporting.
Five practical use cases demonstrate electrical device evaluation; system-level testing of 1.6T optical transceivers and bidirectional AOC/AEC assemblies; automated Tx Finite Impulse Response (FIR) tap tuning with Keysight digital communications analyzers; and IEEE 802.3-compliant stressed optical receiver sensitivity testing with the Keysight M8070B BERT platform. Together, these capabilities provide comprehensive error-performance validation for R&D, quality assurance, manufacturing, interoperability, and next-generation AI network infrastructure.