Data Sheets
Overview
Introduction
The M9703A is a very fast versatile DC-coupled 12-bit wideband digital receiver/digitizer, providing exceptional measurement fidelity over multiple phase coherent channels. Based on the AXIe standard, offering eight acquisition channels in a single-slot card, it provides excellent channel density and flexible scalability. These features allow the implementation of a large number of high dynamic range, phase-coherent channels in a small volume, making the M9703A high-speed digitizer/wideband digital receiver ideal for multi-channel applications in advanced physics, aerospace & defense, and RF communications.
Product description
The M9703A is a revolutionary 8-channel, 12-bit wideband digital receiver/digitizer, implementing a patented front-end able to capture signals from DC up to 2 GHz at 1.6 GS/s, with exceptional measurement accuracy. An interleaving capability allows two channels to be combined to acquire at 3.2 GS/s on four channels with more than 1 GHz instantaneous bandwidth.
The M9703A wideband digital receiver/digitizer also provides very long on-board acquisition memory and real-time data processing capability with four Virtex 6 FPGAs.
The on-board FPGAs can feature an optional real-time digital downconverter (DDC) that allows tuning and zooming on the signal to be analyzed. The DDC functionality improves the dynamic range, reduces the noise floor, extends the capture time, and accelerates the measurement speed.
For information on other firmware options please contact Keysight Technologies, Inc.: digitizers@keysight.com
The M9703A high-speed digitizer can also be combined with the Keysight 89600 VSA software for advanced multi-channel signal analysis.
Example applications
Medical research instrumentation
Environmental monitoring (Laser and Lidar)
Analytical time-of-flight (TOF)
Ultrasonic non-destructive testing (NDT)
Semiconductor
Product features
8 channels (4 when interleaving) with 12-bit resolution
Up to 3.2 GS/s sampling rate (with -SR2 and -INT options)
DC to 2 GHz input frequency range (with -F10 option in non interleaved acquisition)
Accurate time-to-trigger interpolator (TTI)
Up to 16 GB (1 GSamples/ch) on-board memory
PCIe backplane providing 1.1 GB/s data transfer speed
4 configurable Virtex-6 FPGAs
Real-time digital downconversion (DDC) 8 phase-coherent channels with independent local oscillators (LO) setting, tunable with 0.01 Hz resolution
Adjustable analysis bandwidth from 300 MHz down to less than 1 kHz
Magnitude trigger
Uncompromising values
Very wide bandwidth and fast acquisition with optimized dynamic range
Get toward a fully digital receiver
Scalable phase-coherent acquisition channels in a small space
High measurement throughput
Open FPGA for custom processing
Reduced test time by tuning and zooming on signals (requires -DDC option) Isolate the signal of interest
Improve the dynamic range
Extend the capture time, or reduce the amount of transferred data
Trigger on the signal of interest
Hardware platform
Product overview
The M9703A is a flexible modular wideband digital receiver/ digitizer offering scalable features depending on application requirements. The standard configuration implements 8 channels of 12-bit resolution with DC to 650 MHz input frequency range (–3 dB analog bandwidth), and acquiring data at 1 GS/s. If higher speed is required, the -SR2 option enables the eight channels to sample at 1.6 GS/s. An interleave option (-INT) also allows two channels to be combined and reach 3.2 GS/s in 4-channel acquisition mode. For higher frequency signals, the -F10 option provides an extended input frequency range of DC up to 2 GHz in non interleaved mode, or DC to > 1 GHz when interleaving channels 1.
For applications where the dynamic range and signal sensitivity is critical, the -FRF option provides optimized analog performance for the best measurement integrity.
Data processing
The M9703A implements four Xilinx Virtex-6 FPGAs dedicated to data processing. The four data processing units (DPU) implement a standard digitizer functionality firmware by default, allowing digitization of the signal, storage of the resulting data in the on-board memory and transfer through the PCIe backplane bus.
The four DPUs may optionally feature a real-time digital downconversion (DDC) IP algorithm if ordered with the -DDC or the -LDC options. The DDC allows tuning and zooming on the signals to be analyzed, improving the dynamic range, reducing the noise floor, extending the capture time, and accelerating the measurement speed.
The -LDC option is especially suited for MIMO and multi-channel BBIQ applications. It provides up to 80 MHz of real-time frequency span (analysis bandwidth) per channel when combined with the -SR2 option (up to 50 MHz with -SR1).
For demanding applications, the -DDC option extends the real-time frequency span/analysis bandwidth to up to 300 MHz. Both -LDC and -DDC allow to vary the center frequency from DC to 1.6 GHz 2 independently per channel.
The M9703A also provides open access to its on-board processing FPGAs for custom algorithm implementation. This can be reached through the SystemVue software W1462BP FPGA Architect, providing an automatic push button programming approach.
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