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Keysight Technologies
M9195A PXIe Digital Stimulus/Response with PMU: 250 MHz, 16-channel
Data Sheet
Overview
Experience high speed digital test capabilities at a whole new level. The Keysight Technologies, Inc. M9195A PXIe Digital Stimulus/Response (PXI DSR) module is ideal for IC design validation and production test environments. It goes beyond providing just standard capabilities. The new 16-channel, single slot PXI module introduces a high performance pattern cyclizer for powerful pattern creation including advanced timing capabilities such as multiple drive edges per cycle. This provides flexible edge placement and stimulus/response delays for timing margin testing or cable length compensation. Additionally, it can support up to four independent multi-sites with an independent sequencer for each site. Software tools included with the M9195A allow the user to modify vector and pattern parameters without requiring the user to recompile and download tests.
Additonal ATE features include:
With the PXI DSR module you can easily emulate standard serial interfaces like the MIPI™ RF Front-End interface or proprietary parallel device interfaces. The test development software tools enable you to quickly create and edit waveform patterns or to import patterns created by automatic test generation applications.
Applications
Key features
M9195A hardware overview
Individual channel capability
Each of the 16 bidirectional channels provide programmable logic levels of -1.5 V to +6.5 V with 152 μV resolution. The per channel 4 quadrant parametric measurement unit (PMU) enables FVMI, FIMV, FVMV, and FIMI and FNMV modes. With the 5 PMU current ranges between ±2 μA to ±40 mA, users can make accurate leakage measurements.
Each channel can be configured for parametric measurements, as a static digital I/O pin, or with synchronized cyclized digital data. Digital channel direction and timing can be flexibly controlled on a per digital vector basis. The cyclized data allows each pin to operate in RZ or NRZ modes. In combination with the 1 ns edge placement resolution, each pin allows for an adjustable output delay, for timing margin testing, and receive delay to compensate for cabling propagation delays.
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