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- Oscilloscopes + Analyzers
- Test routing and switching or 5G radio unit chip design
- Use elastic virtual test solution with support for globally distributed users
- Access packet and signal rate measurements and statistics
- Support automation with REST, Python, TCL, Perl, and Ruby
- Integrate with a variety of emulators to add the stimulus needed to validate network protocols in chip design
- Ensure zero packet loss between virtual IxVerify and the emulation system
- Share test configurations and scripts across pre-silicon and post-silicon test environments
Problem: Network Chip Design Verification Happens Too Late in the Development Cycle
Increased use of end-user streaming applications, cloud computing, and 5G deployments that require low-latency, high-throughput, and secure traffic are pushing the boundaries of network capacity. This demand drives the market for ultra-high-speed devices powered by state-of-the-art application-specific integrated circuit (ASIC) and system-on-a-chip (SoC) solutions.
Delivering an Ethernet switching ASIC capable of managing terabits of traffic on hundreds of ports or SmartNIC devices is a costly and lengthy process. Designing 5G Radio Unit ASICs to sustain O-RAN functions such as beamforming, precoding, IQ decompression or iFFT for massive MIMO deployments requires a huge amount of work to implement and test.
Not having the right tools, knowledge, or methodology to robustly test the chip designs may cause costly, image-damaging re-spins that further delay time to market.
IxVerify deployment in an emulation-based design verification environment.
Solution: Shift Testing to the Left with Virtualized, Scalable Pre-Silicon Chip Validation
IxVerify is the industry’s first test solution purpose-built for pre-silicon verification. With IxVerify, Keysight and its partners are leading the way in transforming the EDA market by offering virtualized design verification solutions that work in conjunction with next-generation verification flows—leveraging virtualization to reduce dedicated and specialized hardware costs while offering increased flexibility.
Whether validating routing and switching or 5G designs, IxVerify enables new and improved test methodologies to simplify hardware design verification, fuels greater collaboration between hardware and software teams, and enables a shift-left approach to testing earlier in the product lifecycle.
Simplify Chipset Network Protocol Testing
With its ability to run a large number of virtualized test ports at once, IxVerify offers the unique ability to verify the largest chip designs with dynamically shaped traffic, ensuring zero packet loss at maximum emulation speeds.
IxVerify provides 450+ predefined packet templates for testing Ethernet and TCP/IP protocols and can generate high volumes of traffic.
For 5G testing, IxVerify is aligned with the latest ORAN specifications and offers access to predefined test models as well as the ability to configure 5G NR frames manually in concordance with the industry standards. This, combined with the high usability of the solution, allows the configuration of complex testing scenarios hundreds of times faster than any other solution on the market.
IxVerify Solves Your Real-World Test Challenges
Featured Resources - Routing and Switching Chip Design Test
IxVerify Routing and Switching fully virtual testing solution provides a zero-packet-loss environment to send Ethernet packets towards an ASIC design over an easily scalable number of interfaces up to 800GE. Designed to interoperate with the top three EDA companies in the market, this solution brings to pre-silicon more than 20 years of networking testing experience based on mature testing methodologies, strong automation, and highly usable user interfaces.
Whether the design under test is a switch, router, smart NIC or automotive ASIC, IxVerify provides 450+ protocol templates and standards-based RFC benchmarking tests over TCL, Rest API, or Python automation to easily and consistently assess chip performance through robust APIs.
MACsec and IEEE 802.1Qbu frame preamble testing at line rate are completing the existing design validation that provides per-packet latency, data integrity, sequence checking, pause/ PFC and CRC/ protocol checksum features allowing also negative testing and impairment injection.
Featured Resources - 5G Radio Unit Chip Design Test
IxVerify 5G O-RAN, Keysight’s 5G pre-silicon testing solution, is a full suite of tools for testing 5G SoCs and interoperates with Keysight’s PathWave Signal Generation software, Open RAN Studio software, and PathWave Vector Signal Analysis (VSA) software. Being the pre-silicon version of the Open RAN Studio Player, it follows the same configuration flow to send 5G O-RAN stimulus into the 5G SoC design in emulation.
As a fully virtual solution, it deploys and uses multiple interfaces that connect to the hardware emulator through dedicated Ethernet to inject C- and U-plane eCPRI traffic and AXI (or similar) transactors for radio over Ethernet (RoE) IQ data packets. This combination and precise control of different interfaces in IxVerify 5G O-RAN allow simulating complex Downlink and Uplink scenarios in minutes.