EDA2025 for High-Speed Digital Design

Watch this video to learn more about the EDA 2025 release of ADS for High-speed Digital Design.

A Simulation Workflow for High-Speed Digital Design

Explore a simulation workflow for debugging high-speed digital designs using jitter separation. Jitter separation identifies the sources of signal integrity degradation.

PathWave Offerings for High-Speed Digital Designers

High-speed design featured at DesignCon

End-to-End High-Speed Digital Design

As technology continues to advance at an unprecedented rate, the landscape of PCB design is constantly evolving, presenting both exciting opportunities and daunting challenges. This eBook delves into the key factors driving this acceleration - faster data transfer and processing, smaller and more powerful chips, and the emergence of new standards and protocols - all of which demand a holistic approach to optimize signal integrity and reliability.

High-Speed Digital Design Learning Hub

Printed circuit boards (PCBs) get more complex and densely packed as technology advances and devices shrink. Faster insights are crucial for design success. Learn about the latest standards and discover how Keysight electronic design automation (EDA) solutions speed up your workflow for high-speed digital (HSD) design applications.

High Speed Digital Design with Advanced Design System

This brochure describes 3 ADS suites of applicable simulators, libraries, and capabilities for signal integrity engineers.

High-Speed Digital Design Simulation with IBIS-AMI

HeeSoo Lee teaches design simulation for high-speed digital systems using PathWave ADS and IBIS-AMI models using SerDes memory designs as an example.

Four Considerations for High-Speed Digital Design Success

PathWave ADS 2023 for High Speed Digital Design

Introduces the latest release of Keysight's PathWave ADS software for high-speed digital design. The video discusses the new features and enhancements in PathWave ADS 2023, such as support for new signal integrity (SI) and power integrity (PI) standards, new tools for modeling and simulating DDR5 memory, improved performance and accuracy of SI and PI simulations, and new features for power electronics design.

What New Challenges Await High-Speed Digital Designers?

DDR memory is evolving rapidly, high-speed serial is increasingly complex, and the demand for faster speeds is here to stay. To keep pace, engineers must prepare themselves for emerging technologies.

High-Speed Digital Design Success Demands A Modern Workflow

PathWave ADS 2023 for High-Speed Digital Design and Simulation

PathWave Advanced Design System (ADS) for signal integrity (SI) and power integrity (PI) is built to handle the challenges of today’s high-data-rate, densely-routed, complex printed circuit board (PCB) designs

Optimizing UCIe Implementations in Multi-Die High-Speed Digital Designs

High-speed I/O standards evolve, exemplified by Chiplet's UCIe, meeting demands for speed, efficiency, and low power. UCIe fosters modular design, cutting complexity and costs. The presentation delves into UCIe's basics, crafting an electrical simulation model for D2D PHY IP, and demonstrates Keysight Chiplet PHY Designer's efficacy in simulating D2D link performance, showcasing UCIe's advantages.

An Innovative Simulation Workflow for Debugging High-Speed Digital Designs Using Jitter Separation

To obtain each and every measurement using a power meter or power sensor, users need to send a query command before taking the measurement. When taking a large amount of readings, for example 1,000, the user must send 1,000 queries and read the results 1,000 times. This method results in a prolonged test time because of the programming overhead and power meter’s or power sensor’s operation. This overhead can be greatly reduced by accumulating measurements in the power meter’s buffer and then sending the measurement results out in one read operation performed by the controller. As this application note illustrates, depending on the model, the Keysight power meters and power sensors retrieve 50 or 100 readings using Buffer mode and Fast mode.

Keysight ADS 2025 for High-speed Digital Design 

In-depth webinar about the highlights of the latest release of our High-speed Digital Design electronic design automation (EDA) software suites.

ADS2027 Highlights for High Speed Digital

This video shows what’s new in Keysight ADS 2027 for high-speed digital design, including guided memory simulation, expanded MIPI and Ethernet support, improved SI/PI and EM modeling, enhanced 3D interconnect capabilities, and new automation features that help engineers accelerate setup, analysis, and design exploration.

Optimizing High-Speed Interfaces & Conducted EMI Made Easy

Delve into the world of high-speed digital design.

Design Team Increases Efficiency of High-Speed Digital Boards by 100%

IPS found that Keysight’s Advanced Design System (ADS) contained all the tools and processes it needed to design stable, reliable high-speed digital PCBs.

High-Speed Digital System Design

High-speed digital standards are improving to keep pace with emerging technologies such as 5G, IoT, AI, virtual reality (VR), and autonomous vehicles.

High-Speed Digitizers

This selection guide presents the range high-speed digitizer in AXIe, PXIe and PCIe form factor.