Chip Clock Frequency Tolerance

Definition

Chip clock frequency tolerance is a measure of how much the chip clock frequency is offset from the desired chip clock frequency.

Standards

• IEEE Std. 802.11b-1999 16 September 1999 Paragraph 18.4.7.5 Chip Clock Frequency Tolerance
• ANSI/IEEE Std 802.11 First Edition 1999-00-00 Paragraph 15.4.7.6 Chip Clock Frequency Tolerance

Measurement Subtleties

The chip clock frequency tolerance is important for many reasons.

Circuit transients can produce time-varying frequency changes in the local oscillator. The performance of the equalizer in the receiver depends on the preamble sequence used for training. This can be adversely affected by the transient frequency instabilities in the transmitter.

The radio must provide a transmit chip clock which samples the I and Q outputs of the reference receiver. The chip clock must align the samples for EVM calculation.

You can see the chip clock frequency error numerically by using the 89601A or 89607A software.

Test Tools

You can make the chip clock frequency tolerance measurement with the Keysight 89601A vector signal analysis software, in conjunction with a Keysight signal analyzer. In fact, the 89607A WLAN test suite will automatically measure this value, and display the results. 

You can use the 89600 Series vector signal analyzer standalone, in conjunction with the ESA-E and PSA Series spectrum analyzers, and with several of Keysight's Infiniium family of oscilloscopes. You can use the ESA or PSA Series spectrum analyzers as down-converting front ends for the 89600 (with specific options). This provides vector signal analysis capabilities up to 50 GHz. In standalone mode, the 89600 provides vector signal analysis up to 6 GHz, with one or two channel inputs, for IQ, IF, and RF measurements.

You can interface to the 89600 analysis software directly to Keysight's advanced design software (ADS) to create a powerful design and analysis tool.