ICT Boundary Scan Development Steps
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Test point access and good data make all the difference.
Boundary Scan is a limited access solution created to recover the coverage when test access is lost on a PCB. Test development is one of the critical stages to determine the success of boundary scan implementation at in-circuit test. This month, we look at several boundary scan ICT test development steps. PCB boundary scan test point access. A critical step in implementing boundary scan test successfully is to ensure that access to test points is available for nodes needed for the test. Analyzing probe access on boundary scan using available ICT tools allows the test engineer to review the test access on the PCB. One challenge of IEEE Std. 1149.1 and IEEE Std. 1149.6 implementation on PCBs is the availability of a compliant BSDL that is physically verified from the silicon. A BSDL file provided by the ICT is the only link between the test development engineer and the sili-con device that describes the correct boundary scan cell type, sequence and number of cells, manufacturing identity code, boundary scan register length and other related information