Compute Express Link (CXL): A New Coherency Protocol Over PCIe

Application Notes

Multiple technology trends have combined to fuel the expansion in worldwide datacenter capacity. That capacity has been expanding both in breaking ground on new datacenters, and improving the compute, storage, and network capabilities within and between those datacenters. An important new interface that will be widely deployed in datacenters in the coming years is Compute Express Link® (CXL®), an important technology that leverages the dependability and performance of the PCIe physical layer and introduces new high bandwidth and low latency protocols on top of PCIe for attaching accelerators and memory buffers.

CXL: Meeting the Memory Latency Challenge

For CXL devices to effectively handle the workload demands unique to accelerators and memory buffers, they must operate with much lower latency than what the PCIe interface natively allows. The protocol features and enhancements that are deployed in coming generations of PCIe and CXL present unique challenges to the system designer.

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Compute Express Link (CXL): A New Coherency Protocol Over PCIe

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