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W2319EP Silicon RFIC Interoperability w/Virtuoso Element

售貨廠商:

配置

價格: 台灣

* 價格如有變動,恕不另行通知。 此處所列價格為製造商建議零售價格(MSRP)

主要技術規格

The Advanced Design System (ADS) Silicon RFIC Interoperability w/Virtuoso Element:

  • Enables the use of schematics initially created in Virtuoso within ADS
  • Enables the use of CDF component definitions in an “Interoperable mode” and other OpenAccess compatibility functionalities
  • Works from a baseline Virtuoso PDK with minimal ADS-specific add-ons 

敘述

The W2319EP Silicon RFIC Interoperability w/Virtuoso Element enables ADS users to edit and simulate designs created in Cadence Design System's Virtuoso software. A user can start the schematic capture in ADS or Virtuoso and continue design activities in the other platform. Only a single OpenAccess schematic view representation exists and any modifications a user does in ADS (or Virtuoso) is saved the same design database. This enables various user scenarios; for example, a user starts to design and simulate the schematic in ADS, including performing tuning/optimization/yield, viewing simulation results, back-annotating operating points, etc. and then opens the same schematic in Virtuoso to perform the implementation. Or a user wants to validate critical RF block characteristics of a larger-scale mixed-signal schematic created in Virtuoso within ADS.

The ADS/Virtuoso RFIC Interoperability element is targeted for silicon foundry processes and depends on the availability of an enabled Virtuoso baseline process design kit (PDK).