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E1450A 160 MHz, 12-channel timing module

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主要技術規格

  • 160 MHz Timing Module
  • Up to 256 timing cycles
  • 6.25nsec edge placement resolution
  • 12 pattern clocks (six for stimulus, six for response) to 10 E1451A/E1452A Pattern I/O Modules

敘述

The Keysight E1450A 160 MHz Timing Module is a two-slot, C-size VXIbus register-based module containing a timebase, timing generators, trigger circuits, wait-for-condition circuits, marker circuits, and sequence.

The E1450A provides control signals for the DUT and timing for the sequence of patterns that are generated or recorded by the Keysight E1451A/E1452A Pattern I/O Modules. The timing module may be externally synchronized with signals from other instruments in the system or the DUT.

Emulation of complex bus cycles is made possible with up to 256 timing cycles. On-the-fly timing changes allow parameters such as cycle length and edge placement to change from cycle-to-cycle. Margin testing can be accomplished by varying timing edge placement.

The Keysight 1450A provides 12 pattern clocks (6 for stimulus, 6 for response) to as many as ten E1451A/E1452A Pattern I/O Modules in the same VXIbus mainframe. The timing module also supplies up to eight general purpose control signals for strobes, clocks, etc., to the DUT for synchronization ports that must clock together.

The Timing Module can be externally synchronized with the DUT or other instrumentation. Triggers can be received from the VXIbus backplane, front SMB connectors, or the DUT.