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- Control of master and target protocol and traffic behavior for traffic emulation and debugging.
- PCI state logic analyzer 32 k (1 M optional) with PCI-oriented triggering and storage qualification for convenient traffic analysis.
- PCI protocol checker monitors 25 protocol rules in real-time for capturing violations (according to PCI Specification Rev 2.1).
- Add-on comprehensive GUIs for convenient, interactive debugging performance analysis.
- Control over RS232, PCI, or bi-directional Centronics.
- Add-on, ready-to-run stress tests and protocol permutation library to intensify tests.
- Optional trigger sequencer with 64 branches to trigger, store data, decrement and pre-load counter.
- On-board 128 kB PCI memory and/or/ I/O space for emulating master and target resources.
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