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逻辑分析仪应用软件

逻辑分析仪应用软件帮助您快速了解数字系统。这些应用软件提供了许多额外的能力,包括缩短设置时间和定制测量显示等等。

我们业界领先的FPGA解决方案不仅能够简化对内部FPGA信号的访问,而且还能显著缩短设置逻辑分析仪测量所需要的时间,因此可为您节省数小时的调试时间。

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B4661A ONFi Analysis Window User Guide
This guide describes how to use the ONFi Analysis window in the Logic and Protocol Analyzer GUI to analyze the captured ONFi data.

用户手册 2019-07-12

PDF PDF 2.33 MB
B4661A Memory Analysis Window User Guide
This guide describes how to use the Memory Analysis window in the Logic and Protocol Analyzer GUI to perform post processing on the captured memory data.

用户手册 2019-07-12

PDF PDF 4.32 MB
B4661A DDR/LPDDR Post Process Compliance Tool User Guide
This guide describes how to use the DDR/LPDDR Post Process Compliance tool to evaluate the captured DDR/LPDDR data against a set of user-defined limits.

用户手册 2019-07-12

PDF PDF 5.50 MB
Real-Time Compliance Tool User Guide
This guide describes how to configure and use the Real-Time Compliance tool that evaluates DDR/LPDDR data in real-time to detect and report violations to compliance limits specified in DDR/LPDDR specifications.

用户手册 2018-11-29

PDF PDF 2.97 MB
B4661A Memory Analysis Software for Logic Analyzers - Data Sheet
With the B4661A memory analysis software and a Keysight logic analyzer, users can monitor DDR3/4 or LPDDR2/3/4 systems to debug, improve performance, and validate protocol compliance.

产品资料 2018-05-25

PDF PDF 2.94 MB
B4661A DDR Bus Decoder User Guide
This guide describes how to use the B4661A DDR Bus Decoder software to view transactions, commands, and data from a DDR2, DDR3, or DDR4 memory bus.

用户手册 2016-08-04

PDF PDF 1.16 MB
B4661A LPDDR Bus Decoder User Guide
This guide describes how to use the B4661A LPDDR Bus Decoder software with a Keysight Logic Analyzer to decode and view transactions, commands, and data from a LPDDR1, LPDDR2, LPDDR3, and LPDDR4 SDRAM memory bus in your device under test.

用户手册 2015-12-02

PDF PDF 1.60 MB