!!!!    6    0    1  987022829  Vfd36                                         

! Device           : cxk54256
! Function         : 64k x 4 bit CMOS Static RAM
! revision         : B.01.00
! safeguard        : high_out_hcmos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

vector cycle 400n
receive delay 300n

assign VCC                        to pins 24
assign GND                        to pins 12

assign Address                    to pins 23,22,21,20
assign Address                    to pins 19,18,10,9
assign Address                    to pins 8,7,6,5
assign Address                    to pins 4,3,2,1

assign Data                       to pins 14,15,16,17
assign Data_D0                    to pins 17   !AT Added for minimum pin test.
assign Data_D1                    to pins 16   !AT Added for minimum pin test.
assign Data_D2                    to pins 15   !AT Added for minimum pin test.
assign Data_D3                    to pins 14   !AT Added for minimum pin test.

assign Enables                    to pins 11,13 ! CE_bar,WE_bar

family TTL

power VCC, GND

inputs        Address, Enables
bidirectional Data
bidirectional Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for min. pin test.

format hexadecimal  Address,Data

disable Data with Enables      to "1x"
disable Data with Enables      to "x0"

when Enables is "1x"  inactive Data
when Enables is "x0"  inactive Data

trace Data  to Address,Enables

warning "This test requires pullups on pins 14,15,16,17 for the unit"
warning "Test CE_bar"

!**********************************************************************
!****************     VECTOR   SECTION     ****************************
!**********************************************************************

vector Start
   drive Data
   set Data        to "0"
   set Address     to "0000"
end vector

vector Drive_Keep
   drive Data
   set Data        to "k"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Receive_Keep
   receive Data
   set Data        to "x"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Write_Enabled
   initialize to Drive_Keep
   set Enables     to "00"
end vector

vector Read_Enabled
   initialize to Receive_Keep
   set Enables     to "01"
end vector

vector Add_0000_W
   initialize to Drive_Keep
   set Address     to "0000"
end vector

vector Add_0001_W
   initialize to Drive_Keep
   set Address     to "0001"
end vector

vector Add_0002_W
   initialize to Drive_Keep
   set Address     to "0002"
end vector

vector Add_0004_W
   initialize to Drive_Keep
   set Address     to "0004"
end vector

vector Add_0008_W
   initialize to Drive_Keep
   set Address     to "0008"
end vector

vector Add_0010_W
   initialize to Drive_Keep
   set Address     to "0010"
end vector

vector Add_0020_W
   initialize to Drive_Keep
   set Address     to "0020"
end vector

vector Add_0040_W
   initialize to Drive_Keep
   set Address     to "0040"
end vector

vector Add_0080_W
   initialize to Drive_Keep
   set Address     to "0080"
end vector

vector Add_0100_W
   initialize to Drive_Keep
   set Address     to "0100"
end vector

vector Add_0200_W
   initialize to Drive_Keep
   set Address     to "0200"
end vector

vector Add_0400_W
   initialize to Drive_Keep
   set Address     to "0400"
end vector

vector Add_0800_W
   initialize to Drive_Keep
   set Address     to "0800"
end vector

vector Add_1000_W
   initialize to Drive_Keep
   set Address     to "1000"
end vector

vector Add_2000_W
   initialize to Drive_Keep
   set Address     to "2000"
end vector

vector Add_4000_W
   initialize to Drive_Keep
   set Address     to "4000"
end vector

vector Add_8000_W
   initialize to Drive_Keep
   set Address     to "8000"
end vector

vector Add_0000_R
   initialize to Receive_Keep
   set Address     to "0000"
end vector

vector Add_0001_R
   initialize to Receive_Keep
   set Address     to "0001"
end vector

vector Add_0002_R
   initialize to Receive_Keep
   set Address     to "0002"
end vector

vector Add_0004_R
   initialize to Receive_Keep
   set Address     to "0004"
end vector

vector Add_0008_R
   initialize to Receive_Keep
   set Address     to "0008"
end vector

vector Add_0010_R
   initialize to Receive_Keep
   set Address     to "0010"
end vector

vector Add_0020_R
   initialize to Receive_Keep
   set Address     to "0020"
end vector

vector Add_0040_R
   initialize to Receive_Keep
   set Address     to "0040"
end vector

vector Add_0080_R
   initialize to Receive_Keep
   set Address     to "0080"
end vector

vector Add_0100_R
   initialize to Receive_Keep
   set Address     to "0100"
end vector

vector Add_0200_R
   initialize to Receive_Keep
   set Address     to "0200"
end vector

vector Add_0400_R
   initialize to Receive_Keep
   set Address     to "0400"
end vector

vector Add_0800_R
   initialize to Receive_Keep
   set Address     to "0800"
end vector

vector Add_1000_R
   initialize to Receive_Keep
   set Address     to "1000"
end vector

vector Add_2000_R
   initialize to Receive_Keep
   set Address     to "2000"
end vector

vector Add_4000_R
   initialize to Receive_Keep
   set Address     to "4000"
end vector

vector Add_8000_R
   initialize to Receive_Keep
   set Address     to "8000"
end vector

vector Add_1111_W
   initialize to Drive_Keep
   set Address     to "1111"
end vector

!*************************************************************

vector Dat_0_W
   initialize to Drive_Keep
   set Data        to "0"
end vector

vector Dat_1_W
   initialize to Drive_Keep
   set Data        to "1"
end vector

vector Dat_2_W
   initialize to Drive_Keep
   set Data        to "2"
end vector

vector Dat_3_W
   initialize to Drive_Keep
   set Data        to "3"
end vector

vector Dat_4_W
   initialize to Drive_Keep
   set Data        to "4"
end vector

vector Dat_5_W
   initialize to Drive_Keep
   set Data        to "5"
end vector

vector Dat_6_W
   initialize to Drive_Keep
   set Data        to "6"
end vector

vector Dat_7_W
   initialize to Drive_Keep
   set Data        to "7"
end vector

vector Dat_8_W
   initialize to Drive_Keep
   set Data        to "8"
end vector

vector Dat_9_W
   initialize to Drive_Keep
   set Data        to "9"
end vector

vector Dat_A_W
   initialize to Drive_Keep
   set Data        to "A"
end vector

vector Dat_B_W
   initialize to Drive_Keep
   set Data        to "B"
end vector

vector Dat_C_W
   initialize to Drive_Keep
   set Data        to "C"
end vector

vector Dat_D_W
   initialize to Drive_Keep
   set Data        to "D"
end vector

vector Dat_E_W
   initialize to Drive_Keep
   set Data        to "E"
end vector

vector Dat_F_W
   initialize to Drive_Keep
   set Data        to "F"
end vector

vector Dat_0_R
   initialize to Receive_Keep
   set Data        to "0"
end vector

vector Dat_1_R
   initialize to Receive_Keep
   set Data        to "1"
end vector

vector Dat_2_R
   initialize to Receive_Keep
   set Data        to "2"
end vector

vector Dat_3_R
   initialize to Receive_Keep
   set Data        to "3"
end vector

vector Dat_4_R
   initialize to Receive_Keep
   set Data        to "4"
end vector

vector Dat_5_R
   initialize to Receive_Keep
   set Data        to "5"
end vector

vector Dat_6_R
   initialize to Receive_Keep
   set Data        to "6"
end vector

vector Dat_7_R
   initialize to Receive_Keep
   set Data        to "7"
end vector

vector Dat_8_R
   initialize to Receive_Keep
   set Data        to "8"
end vector

vector Dat_9_R
   initialize to Receive_Keep
   set Data        to "9"
end vector

vector Dat_A_R
   initialize to Receive_Keep
   set Data        to "A"
end vector

vector Dat_B_R
   initialize to Receive_Keep
   set Data        to "B"
end vector

vector Dat_C_R
   initialize to Receive_Keep
   set Data        to "C"
end vector

vector Dat_D_R
   initialize to Receive_Keep
   set Data        to "D"
end vector

vector Dat_E_R
   initialize to Receive_Keep
   set Data        to "E"
end vector

vector Dat_F_R
   initialize to Receive_Keep
   set Data        to "F"
end vector

vector CE_bar_high
   initialize to Receive_Keep
   set Enables     to "11"
end vector

vector Disabled_Dat_F_R
   initialize to Receive_Keep
   set Enables     to "11"
   set Data        to "F"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector Start_D0
   drive Data_D0
   set Data_D0     to "0"
   set Address     to "0000"
end vector

vector Drive_Keep_D0
   drive Data_D0
   set Data_D0     to "k"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Receive_Keep_D0
   receive Data_D0
   set Data_D0     to "x"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Write_Enabled_D0
   initialize to Drive_Keep_D0
   set Enables     to "00"
end vector

vector Read_Enabled_D0
   initialize to Receive_Keep_D0
   set Enables     to "01"
end vector

vector Add_0000_W_D0
   initialize to Drive_Keep_D0
   set Address     to "0000"
end vector

vector Add_0000_R_D0
   initialize to Receive_Keep_D0
   set Address     to "0000"
end vector

vector Dat_0_W_D0
   initialize to Drive_Keep_D0
   set Data_D0     to "0"
end vector

vector Dat_1_W_D0
   initialize to Drive_Keep_D0
   set Data_D0     to "1"
end vector

vector Dat_0_R_D0
   initialize to Receive_Keep_D0
   set Data_D0     to "0"
end vector

vector Dat_1_R_D0
   initialize to Receive_Keep_D0
   set Data_D0     to "1"
end vector

vector Start_D1
   drive Data_D1
   set Data_D1     to "0"
   set Address     to "0000"
end vector

vector Drive_Keep_D1
   drive Data_D1
   set Data_D1     to "k"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Receive_Keep_D1
   receive Data_D1
   set Data_D1     to "x"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Write_Enabled_D1
   initialize to Drive_Keep_D1
   set Enables     to "00"
end vector

vector Read_Enabled_D1
   initialize to Receive_Keep_D1
   set Enables     to "01"
end vector

vector Add_0000_W_D1
   initialize to Drive_Keep_D1
   set Address     to "0000"
end vector

vector Add_0000_R_D1
   initialize to Receive_Keep_D1
   set Address     to "0000"
end vector

vector Dat_0_W_D1
   initialize to Drive_Keep_D1
   set Data_D1     to "0"
end vector

vector Dat_1_W_D1
   initialize to Drive_Keep_D1
   set Data_D1     to "1"
end vector

vector Dat_0_R_D1
   initialize to Receive_Keep_D1
   set Data_D1     to "0"
end vector

vector Dat_1_R_D1
   initialize to Receive_Keep_D1
   set Data_D1     to "1"
end vector

vector Start_D2
   drive Data_D2
   set Data_D2     to "0"
   set Address     to "0000"
end vector

vector Drive_Keep_D2
   drive Data_D2
   set Data_D2     to "k"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Receive_Keep_D2
   receive Data_D2
   set Data_D2     to "x"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Write_Enabled_D2
   initialize to Drive_Keep_D2
   set Enables     to "00"
end vector

vector Read_Enabled_D2
   initialize to Receive_Keep_D2
   set Enables     to "01"
end vector

vector Add_0000_W_D2
   initialize to Drive_Keep_D2
   set Address     to "0000"
end vector

vector Add_0000_R_D2
   initialize to Receive_Keep_D2
   set Address     to "0000"
end vector

vector Dat_0_W_D2
   initialize to Drive_Keep_D2
   set Data_D2     to "0"
end vector

vector Dat_1_W_D2
   initialize to Drive_Keep_D2
   set Data_D2     to "1"
end vector

vector Dat_0_R_D2
   initialize to Receive_Keep_D2
   set Data_D2     to "0"
end vector

vector Dat_1_R_D2
   initialize to Receive_Keep_D2
   set Data_D2     to "1"
end vector

vector Start_D3
   drive Data_D3
   set Data_D3     to "0"
   set Address     to "0000"
end vector

vector Drive_Keep_D3
   drive Data_D3
   set Data_D3     to "k"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Receive_Keep_D3
   receive Data_D3
   set Data_D3     to "x"
   set Address     to "kkkk"
   set Enables     to "kk"
end vector

vector Write_Enabled_D3
   initialize to Drive_Keep_D3
   set Enables     to "00"
end vector

vector Read_Enabled_D3
   initialize to Receive_Keep_D3
   set Enables     to "01"
end vector

vector Add_0000_W_D3
   initialize to Drive_Keep_D3
   set Address     to "0000"
end vector

vector Add_0000_R_D3
   initialize to Receive_Keep_D3
   set Address     to "0000"
end vector

vector Dat_0_W_D3
   initialize to Drive_Keep_D3
   set Data_D3     to "0"
end vector

vector Dat_1_W_D3
   initialize to Drive_Keep_D3
   set Data_D3     to "1"
end vector

vector Dat_0_R_D3
   initialize to Receive_Keep_D3
   set Data_D3     to "0"
end vector

vector Dat_1_R_D3
   initialize to Receive_Keep_D3
   set Data_D3     to "1"
end vector

!**********************************************************************
!******************    SUBROUTINE    SECTION     *********************
!**********************************************************************

sub Write(Add ,Dat)

   execute Write_Enabled
   execute Add
   execute Dat

subend

sub Read(Add ,Dat)

   execute Read_Enabled
   execute Add
   execute Dat

subend

!AT The following subroutines have been added for a minimum pins test.
!AT Vectors in the subroutines reference the entire data bus.
!AT Therefore this subroutine was copied and modified to reference only
!AT a single pin of the data bus.

sub  Write_Dx (Add, Dat_Dx, Write_Enabled)
   execute Write_Enabled
   execute Add
   execute Dat_Dx
end sub

sub  Read_Dx (Add, Dat_Dx, Read_Enabled)
   execute Read_Enabled
   execute Add
   execute Dat_Dx
end sub


!**********************************************************************
!******************    UNIT    SECTION       **************************
!**********************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit   "awaretest D0 Test"

   execute Start_D0

   call Write_Dx (Add_0000_W_D0, Dat_0_W_D0, Write_Enabled_D0)
   call Read_Dx (Add_0000_R_D0, Dat_0_R_D0, Read_Enabled_D0)

   call Write_Dx (Add_0000_W_D0, Dat_1_W_D0, Write_Enabled_D0)
   call Read_Dx (Add_0000_R_D0, Dat_1_R_D0, Read_Enabled_D0)

end unit

unit   "awaretest D1 Test"

   execute Start_D1

   call Write_Dx (Add_0000_W_D1, Dat_0_W_D1, Write_Enabled_D1)
   call Read_Dx (Add_0000_R_D1, Dat_0_R_D1, Read_Enabled_D1)

   call Write_Dx (Add_0000_W_D1, Dat_1_W_D1, Write_Enabled_D1)
   call Read_Dx (Add_0000_R_D1, Dat_1_R_D1, Read_Enabled_D1)

end unit

unit   "awaretest D2 Test"

   execute Start_D2

   call Write_Dx (Add_0000_W_D2, Dat_0_W_D2, Write_Enabled_D2)
   call Read_Dx (Add_0000_R_D2, Dat_0_R_D2, Read_Enabled_D2)

   call Write_Dx (Add_0000_W_D2, Dat_1_W_D2, Write_Enabled_D2)
   call Read_Dx (Add_0000_R_D2, Dat_1_R_D2, Read_Enabled_D2)

end unit

unit   "awaretest D3 Test"

   execute Start_D3

   call Write_Dx (Add_0000_W_D3, Dat_0_W_D3, Write_Enabled_D3)
   call Read_Dx (Add_0000_R_D3, Dat_0_R_D3, Read_Enabled_D3)

   call Write_Dx (Add_0000_W_D3, Dat_1_W_D3, Write_Enabled_D3)
   call Read_Dx (Add_0000_R_D3, Dat_1_R_D3, Read_Enabled_D3)

end unit

unit "Main"

   execute Start

   call Write(Add_0000_W ,Dat_0_W)
   call Write(Add_0001_W ,Dat_5_W)
   call Write(Add_0002_W ,Dat_A_W)
   call Write(Add_0004_W ,Dat_9_W)
   call Write(Add_0008_W ,Dat_6_W)
   call Write(Add_0010_W ,Dat_5_W)
   call Write(Add_0020_W ,Dat_A_W)
   call Write(Add_0040_W ,Dat_9_W)
   call Write(Add_0080_W ,Dat_6_W)
   call Write(Add_0100_W ,Dat_5_W)
   call Write(Add_0200_W ,Dat_A_W)
   call Write(Add_0400_W ,Dat_9_W)
   call Write(Add_0800_W ,Dat_6_W)
   call Write(Add_1000_W ,Dat_5_W)
   call Write(Add_2000_W ,Dat_A_W)
   call Write(Add_4000_W ,Dat_9_W)
   call Write(Add_8000_W ,Dat_6_W)

   call Read (Add_0000_R ,Dat_0_R)
   call Write(Add_0000_W ,Dat_F_W)
   call Read (Add_0001_R ,Dat_5_R)
   call Write(Add_0001_W ,Dat_F_W)
   call Read (Add_0002_R ,Dat_A_R)
   call Write(Add_0002_W ,Dat_F_W)
   call Read (Add_0004_R ,Dat_9_R)
   call Write(Add_0004_W ,Dat_F_W)
   call Read (Add_0008_R ,Dat_6_R)
   call Write(Add_0008_W ,Dat_F_W)
   call Read (Add_0010_R ,Dat_5_R)
   call Write(Add_0010_W ,Dat_F_W)
   call Read (Add_0020_R ,Dat_A_R)
   call Write(Add_0020_W ,Dat_F_W)
   call Read (Add_0040_R ,Dat_9_R)
   call Write(Add_0040_W ,Dat_F_W)
   call Read (Add_0080_R ,Dat_6_R)
   call Write(Add_0080_W ,Dat_F_W)
   call Read (Add_0100_R ,Dat_5_R)
   call Write(Add_0100_W ,Dat_F_W)
   call Read (Add_0200_R ,Dat_A_R)
   call Write(Add_0200_W ,Dat_F_W)
   call Read (Add_0400_R ,Dat_9_R)
   call Write(Add_0400_W ,Dat_F_W)
   call Read (Add_0800_R ,Dat_6_R)
   call Write(Add_0800_W ,Dat_F_W)
   call Read (Add_1000_R ,Dat_5_R)
   call Write(Add_1000_W ,Dat_F_W)
   call Read (Add_2000_R ,Dat_A_R)
   call Write(Add_2000_W ,Dat_F_W)
   call Read (Add_4000_R ,Dat_9_R)
   call Write(Add_4000_W ,Dat_F_W)
   call Read (Add_8000_R ,Dat_6_R)
   call Write(Add_8000_W ,Dat_F_W)

end unit

unit "Test CE_bar"

   execute Start

   call Write(Add_0000_W ,Dat_0_W)
   call Write(Add_1111_W ,Dat_F_W)
   call Read(Add_0000_R ,Dat_0_R)

   execute Read_Enabled
   execute Add_0000_R
   execute CE_bar_high
   execute Dat_F_R

end unit