!!!! 6 0 1 986331700 V400e ! Device : 74c89 ! Function : Static RAM 3-state 16 x 4 ! revision : B.01.00 ! safeguard : 74c_cmos ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential vector cycle 1u receive delay 900n assign VDD to pins 16 assign VSS to pins 8 assign Address to pins 13,14,15,1 assign Data_Inputs to pins 12,10,6,4 assign Data_Bar_Outputs to pins 11,9,7,5 assign Chip_Select_Bar to pins 2 assign Write_Enable_Bar to pins 3 assign Write_and_Select to pins 2,3 assign Data_in_D0 to pins 4 !AT Added for minimum pin test. assign Data_in_D1 to pins 6 !AT Added for minimum pin test. assign Data_in_D2 to pins 10 !AT Added for minimum pin test. assign Data_in_D3 to pins 12 !AT Added for minimum pin test. assign Data_out_D0 to pins 5 !AT Added for minimum pin test. assign Data_out_D1 to pins 7 !AT Added for minimum pin test. assign Data_out_D2 to pins 9 !AT Added for minimum pin test. assign Data_out_D3 to pins 11 !AT Added for minimum pin test. power VDD, VSS family CMOS inputs Address, Data_Inputs, Chip_Select_Bar, Write_Enable_Bar inputs Data_in_D0, Data_in_D1, Data_in_D2, Data_in_D3 !AT Added for min pin test. outputs Data_Bar_Outputs outputs Data_out_D0, Data_out_D1, Data_out_D2, Data_out_D3 !AT Added for min pin test. disable Data_Bar_Outputs with Write_and_Select to "11" when Write_and_Select is "11" inactive Data_Bar_Outputs trace Data_Bar_Outputs to Address,Data_Inputs trace Data_Bar_Outputs to Chip_Select_Bar,Write_Enable_Bar !********************************************************************** !********************************************************************** vector Address_0000__Data_Input_0000 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Inputs to "0000" end vector vector Address_0000__Output_Bar_1111 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Bar_Outputs to "1111" end vector vector Address_0001__Data_Input_0001 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0001" set Data_Inputs to "0001" end vector vector Address_0001__Output_Bar_1110 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0001" set Data_Bar_Outputs to "1110" end vector vector Address_0011__Data_Input_0011 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0011" set Data_Inputs to "0011" end vector vector Address_0011__Output_Bar_1100 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0011" set Data_Bar_Outputs to "1100" end vector vector Address_0111__Data_Input_0111 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0111" set Data_Inputs to "0111" end vector vector Address_0111__Output_Bar_1000 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0111" set Data_Bar_Outputs to "1000" end vector vector Address_1111__Data_Input_1111 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "1111" set Data_Inputs to "1111" end vector vector Address_1111__Output_Bar_0000 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "1111" set Data_Bar_Outputs to "0000" end vector vector Disable_Write set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "KKKK" set Data_Inputs to "KKKK" end vector vector Enable_Write set Chip_Select_Bar to "0" set Write_Enable_Bar to "0" set Address to "KKKK" set Data_Inputs to "KKKK" end vector vector De_Select set Chip_Select_Bar to "1" set Write_Enable_Bar to "1" set Address to "KKKK" set Data_Bar_Outputs to "1111" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector Address_0000_In_D0_0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_In_D0 to "0" end vector vector Address_0000_In_D0_1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_In_D0 to "1" end vector vector Address_0000_In_D1_0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_In_D1 to "0" end vector vector Address_0000_In_D1_1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_In_D1 to "1" end vector vector Address_0000_In_D2_0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_In_D2 to "0" end vector vector Address_0000_In_D2_1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_In_D2 to "1" end vector vector Address_0000_In_D3_0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_In_D3 to "0" end vector vector Address_0000_In_D3_1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_In_D3 to "1" end vector vector Address_0000_Out_D0_1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Out_D0 to "1" end vector vector Address_0000_Out_D0_0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Out_D0 to "0" end vector vector Address_0000_Out_D1_1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Out_D1 to "1" end vector vector Address_0000_Out_D1_0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Out_D1 to "0" end vector vector Address_0000_Out_D2_1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Out_D2 to "1" end vector vector Address_0000_Out_D2_0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Out_D2 to "0" end vector vector Address_0000_Out_D3_1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Out_D3 to "1" end vector vector Address_0000_Out_D3_0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "0000" set Data_Out_D3 to "0" end vector vector Disable_Write_D0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "KKKK" set Data_In_D0 to "K" end vector vector Disable_Write_D1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "KKKK" set Data_In_D1 to "K" end vector vector Disable_Write_D2 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "KKKK" set Data_In_D2 to "K" end vector vector Disable_Write_D3 set Chip_Select_Bar to "0" set Write_Enable_Bar to "1" set Address to "KKKK" set Data_In_D3 to "K" end vector vector Enable_Write_D0 set Chip_Select_Bar to "0" set Write_Enable_Bar to "0" set Address to "KKKK" set Data_In_D0 to "K" end vector vector Enable_Write_D1 set Chip_Select_Bar to "0" set Write_Enable_Bar to "0" set Address to "KKKK" set Data_In_D1 to "K" end vector vector Enable_Write_D2 set Chip_Select_Bar to "0" set Write_Enable_Bar to "0" set Address to "KKKK" set Data_In_D2 to "K" end vector vector Enable_Write_D3 set Chip_Select_Bar to "0" set Write_Enable_Bar to "0" set Address to "KKKK" set Data_In_D3 to "K" end vector !********************************************************************** !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D0. unit "awaretest D0 Test" execute Address_0000_In_D0_0 execute Enable_Write_D0 execute Disable_Write_D0 execute Address_0000_Out_D0_1 execute Address_0000_In_D0_1 execute Enable_Write_D0 execute Disable_Write_D0 execute Address_0000_Out_D0_0 end unit unit "awaretest D1 Test" execute Address_0000_In_D1_0 execute Enable_Write_D1 execute Disable_Write_D1 execute Address_0000_Out_D1_1 execute Address_0000_In_D1_1 execute Enable_Write_D1 execute Disable_Write_D1 execute Address_0000_Out_D1_0 end unit unit "awaretest D2 Test" execute Address_0000_In_D2_0 execute Enable_Write_D2 execute Disable_Write_D2 execute Address_0000_Out_D2_1 execute Address_0000_In_D2_1 execute Enable_Write_D2 execute Disable_Write_D2 execute Address_0000_Out_D2_0 end unit unit "awaretest D3 Test" execute Address_0000_In_D3_0 execute Enable_Write_D3 execute Disable_Write_D3 execute Address_0000_Out_D3_1 execute Address_0000_In_D3_1 execute Enable_Write_D3 execute Disable_Write_D3 execute Address_0000_Out_D3_0 end unit ! This test will detect pin faults. unit "Writing and Reading test" execute Address_0000__Data_Input_0000 execute Enable_Write execute Disable_Write execute Address_0001__Data_Input_0001 execute Enable_Write execute Disable_Write execute Address_0011__Data_Input_0011 execute Enable_Write execute Disable_Write execute Address_0111__Data_Input_0111 execute Enable_Write execute Disable_Write execute Address_1111__Data_Input_1111 execute Enable_Write execute Disable_Write execute Address_0000__Output_Bar_1111 execute Address_0001__Output_Bar_1110 execute Address_0011__Output_Bar_1100 execute Address_0111__Output_Bar_1000 execute Address_1111__Output_Bar_0000 end unit unit "Test for Chip_Select_Bar stuck at 0" execute Address_1111__Data_Input_1111 execute Enable_Write execute Disable_Write execute De_Select end unit ! End of Test