!!!!    6    0    1  986591930  V9c3d                                         

! Device           : 6513l
! Function         : Static RAM 512 x 4
! revision         : B.01.00
! safeguard        : med_out_mos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

assign      VCC                 to pins           18
assign      GND                 to pins           9

assign      Address             to pins           15,16,17,1,2,3,4,5,6
assign      Chip_enable_bar     to pins           8
assign      Write_bar           to pins           10
assign      Data                to pins           11,12,13,14
assign      Data_D0             to pins   14   !AT Added for minimum pin test.
assign      Data_D1             to pins   13   !AT Added for minimum pin test.
assign      Data_D2             to pins   12   !AT Added for minimum pin test.
assign      Data_D3             to pins   11   !AT Added for minimum pin test.

assign      Y                   to pins           7

family      TTL

power       VCC, GND

inputs      Address, Chip_enable_bar, Write_bar, Y

bidirectional       Data
bidirectional  Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for min. pin test.

when  Chip_enable_bar   is "1"   inactive Data
when  Write_bar         is "1"   outputs  Data
when  Write_bar         is "0"   inputs   Data

trace  Data  to  Address, Chip_enable_bar, Write_bar, Y

disable       Data        with        Chip_enable_bar      to       "1"

!*****************************************************************************
!*****************************************************************************

vector      Address_000000000
     set    Address             to                "000000000"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_000000001
     set    Address             to                "000000001"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_000000011
     set    Address             to                "000000011"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_000000111
     set    Address             to                "000000111"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_000001111
     set    Address             to                "000001111"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_000011111
     set    Address             to                "000011111"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_000111111
     set    Address             to                "000111111"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_001111111
     set    Address             to                "001111111"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_011111111
     set    Address             to                "011111111"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Address_111111111
     set    Address             to                "111111111"
     set    Chip_enable_bar     to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_0000
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "0000"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_0001
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "0001"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_0011
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "0011"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_0111
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "0111"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_1111
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1111"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_1110
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1110"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_1100
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1100"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_1000
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1000"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_1001
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1001"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_1011
     receive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1011"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_write_0000
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "0000"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_0001
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "0001"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_0011
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "0011"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_0111
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "0111"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_1111
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1111"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_1110
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1110"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_1100
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1100"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_1000
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1000"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_1001
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1001"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_1011
     drive Data
     set    Chip_enable_bar     to                "0"
     set    Data                to                "1011"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      End_cycle
     set    Chip_enable_bar     to                "1"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector      Data_read_D0_0
     receive Data_D0
     set    Chip_enable_bar     to                "0"
     set    Data_D0             to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_D0_1
     receive Data_D0
     set    Chip_enable_bar     to                "0"
     set    Data_D0             to                "1"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_D1_0
     receive Data_D1
     set    Chip_enable_bar     to                "0"
     set    Data_D1             to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_D1_1
     receive Data_D1
     set    Chip_enable_bar     to                "0"
     set    Data_D1             to                "1"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_D2_0
     receive Data_D2
     set    Chip_enable_bar     to                "0"
     set    Data_D2             to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_D2_1
     receive Data_D2
     set    Chip_enable_bar     to                "0"
     set    Data_D2             to                "1"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_D3_0
     receive Data_D3
     set    Chip_enable_bar     to                "0"
     set    Data_D3             to                "0"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_read_D3_1
     receive Data_D3
     set    Chip_enable_bar     to                "0"
     set    Data_D3             to                "1"
     set    Write_bar           to                "1"
     set    Y                   to                "0"
end vector

vector      Data_write_D0_0
     drive Data_D0
     set    Chip_enable_bar     to                "0"
     set    Data_D0             to                "0"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_D0_1
     drive Data_D0
     set    Chip_enable_bar     to                "0"
     set    Data_D0             to                "1"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_D1_0
     drive Data_D1
     set    Chip_enable_bar     to                "0"
     set    Data_D1             to                "0"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_D1_1
     drive Data_D1
     set    Chip_enable_bar     to                "0"
     set    Data_D1             to                "1"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_D2_0
     drive Data_D2
     set    Chip_enable_bar     to                "0"
     set    Data_D2             to                "0"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_D2_1
     drive Data_D2
     set    Chip_enable_bar     to                "0"
     set    Data_D2             to                "1"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_D3_0
     drive Data_D3
     set    Chip_enable_bar     to                "0"
     set    Data_D3             to                "0"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

vector      Data_write_D3_1
     drive Data_D3
     set    Chip_enable_bar     to                "0"
     set    Data_D3             to                "1"
     set    Write_bar           to                "0"
     set    Y                   to                "0"
end vector

!*****************************************************************************
!*****************************************************************************

sub         R_W_data (Address,Data)
     execute          Address
     execute          Data
     execute          End_cycle
end sub

!*****************************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit   "awaretest D0 Test"

     call             R_W_data (Address_000000000,Data_write_D0_0)
     call             R_W_data (Address_000000000,Data_read_D0_0)

     call             R_W_data (Address_000000000,Data_write_D0_1)
     call             R_W_data (Address_000000000,Data_read_D0_1)

end unit

unit   "awaretest D1 Test"

     call             R_W_data (Address_000000000,Data_write_D1_0)
     call             R_W_data (Address_000000000,Data_read_D1_0)

     call             R_W_data (Address_000000000,Data_write_D1_1)
     call             R_W_data (Address_000000000,Data_read_D1_1)

end unit

unit   "awaretest D2 Test"

     call             R_W_data (Address_000000000,Data_write_D2_0)
     call             R_W_data (Address_000000000,Data_read_D2_0)

     call             R_W_data (Address_000000000,Data_write_D2_1)
     call             R_W_data (Address_000000000,Data_read_D2_1)

end unit

unit   "awaretest D3 Test"

     call             R_W_data (Address_000000000,Data_write_D3_0)
     call             R_W_data (Address_000000000,Data_read_D3_0)

     call             R_W_data (Address_000000000,Data_write_D3_1)
     call             R_W_data (Address_000000000,Data_read_D3_1)

end unit

unit        "Ram Test"

!    initialize ram
     call             R_W_data (Address_000000000,Data_write_0000)
     call             R_W_data (Address_000000001,Data_write_0001)
     call             R_W_data (Address_000000011,Data_write_0011)
     call             R_W_data (Address_000000111,Data_write_0111)
     call             R_W_data (Address_000001111,Data_write_1111)
     call             R_W_data (Address_000011111,Data_write_1110)
     call             R_W_data (Address_000111111,Data_write_1100)
     call             R_W_data (Address_001111111,Data_write_1000)
     call             R_W_data (Address_011111111,Data_write_1001)
     call             R_W_data (Address_111111111,Data_write_1011)

!    test ram cells
     call             R_W_data (Address_000000000,Data_write_0000)
     call             R_W_data (Address_000000001,Data_write_0001)
     call             R_W_data (Address_000000011,Data_write_0011)
     call             R_W_data (Address_000000111,Data_write_0111)
     call             R_W_data (Address_000001111,Data_write_1111)
     call             R_W_data (Address_000011111,Data_write_1110)
     call             R_W_data (Address_000111111,Data_write_1100)
     call             R_W_data (Address_001111111,Data_write_1000)
     call             R_W_data (Address_011111111,Data_write_1001)
     call             R_W_data (Address_111111111,Data_write_1011)

     call             R_W_data (Address_000000000,Data_read_0000)
     call             R_W_data (Address_000000001,Data_read_0001)
     call             R_W_data (Address_000000011,Data_read_0011)
     call             R_W_data (Address_000000111,Data_read_0111)
     call             R_W_data (Address_000001111,Data_read_1111)
     call             R_W_data (Address_000011111,Data_read_1110)
     call             R_W_data (Address_000111111,Data_read_1100)
     call             R_W_data (Address_001111111,Data_read_1000)
     call             R_W_data (Address_011111111,Data_read_1001)
     call             R_W_data (Address_111111111,Data_read_1011)

end unit

!     End of test