!!!!    6    0    1  986802203  Vbbf8                                         

! Device           : 6132
! Function         : Static RAM 3-state 4k x 8
! revision         : B.01.00
! safeguard        : med_out_mos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

assign       VCC                to pins      28
assign       GND                to pins      14

assign       Address            to pins      23,21,24,25,3,4,5,6,7,8,9,10
assign       AC                 to pins      26
assign       DS_bar             to pins      22
assign       WE_bar             to pins      27
assign       CS_bar             to pins      20
assign       Data               to pins      19,18,17,16,15,13,12,11
assign       Data_D0            to pins      11 !AT Added for minimum pin test.
assign       Data_D1            to pins      12 !AT Added for minimum pin test.
assign       Data_D2            to pins      13 !AT Added for minimum pin test.
assign       Data_D3            to pins      15 !AT Added for minimum pin test.
assign       Data_D4            to pins      16 !AT Added for minimum pin test.
assign       Data_D5            to pins      17 !AT Added for minimum pin test.
assign       Data_D6            to pins      18 !AT Added for minimum pin test.
assign       Data_D7            to pins      19 !AT Added for minimum pin test.
assign       BUSY_bar           to pins      1
assign       NC                 to pins      2

family       TTL

power        VCC, GND

inputs       Address, AC, DS_bar, WE_bar, CS_bar, BUSY_bar

bidirectional       Data
bidirectional  Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for min. pin test.
bidirectional  Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for min. pin test.

nondigital  NC

when     DS_bar         is    "1"   inactive Data
when     CS_bar         is    "1"   inactive Data
when     WE_bar         is    "1"   outputs  Data
when     WE_bar         is    "0"   inputs   Data

trace    Data  to  Address, AC, DS_bar, WE_bar, CS_bar, BUSY_bar

disable      Data      with          DS_bar       to        "1"


!*****************************************************************************
!*****************************************************************************
vector       Address_000000000000
     set     AC           to         "0"
     set     Address      to         "000000000000"
end vector

vector       Address_000000000001
     set     AC           to         "0"
     set     Address      to         "000000000001"
end vector

vector       Address_000000000011
     set     AC           to         "0"
     set     Address      to         "000000000011"
end vector

vector       Address_000000000111
     set     AC           to         "0"
     set     Address      to         "000000000111"
end vector

vector       Address_000000001111
     set     AC           to         "0"
     set     Address      to         "000000001111"
end vector

vector       Address_000000011111
     set     AC           to         "0"
     set     Address      to         "000000011111"
end vector

vector       Address_000000111111
     set     AC           to         "0"
     set     Address      to         "000000111111"
end vector

vector       Address_000001111111
     set     AC           to         "0"
     set     Address      to         "000001111111"
end vector

vector       Address_000011111111
     set     AC           to         "0"
     set     Address      to         "000011111111"
end vector

vector       Address_000111111111
     set     AC           to         "0"
     set     Address      to         "000111111111"
end vector

vector       Address_001111111111
     set     AC           to         "0"
     set     Address      to         "001111111111"
end vector

vector       Address_011111111111
     set     AC           to         "0"
     set     Address      to         "011111111111"
end vector

vector       Address_111111111111
     set     AC           to         "0"
     set     Address      to         "111111111111"
end vector

vector       Read
     set     AC           to         "0"
     set     DS_bar       to         "1"
     set     CS_bar       to         "0"
     set     Address      to         "kkkkkkkkkkkk"
     set     WE_bar       to         "1"
     set     Busy_bar     to         "0"
end vector

vector       AC_high
     set     AC           to         "1"
     set     DS_bar       to         "1"
     set     CS_bar       to         "k"
     set     Address      to         "kkkkkkkkkkkk"
     set     WE_bar       to         "k"
     set     BUSY_bar     to         "0"
end vector

vector       DS_low
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_out_00000000
     initialize to DS_low
     receive Data
     set     Data         to         "00000000"
end vector

vector       Data_out_00000001
     initialize to DS_low
     receive Data
     set     Data         to         "00000001"
end vector

vector       Data_out_00000011
     initialize to DS_low
     receive Data
     set     Data         to         "00000011"
end vector

vector       Data_out_00000111
     initialize to DS_low
     receive Data
     set     Data         to         "00000111"
end vector

vector       Data_out_00001111
     initialize to DS_low
     receive Data
     set     Data         to         "00001111"
end vector

vector       Data_out_00011111
     initialize to DS_low
     receive Data
     set     Data         to         "00011111"
end vector

vector       Data_out_00111111
     initialize to DS_low
     receive Data
     set     Data         to         "00111111"
end vector

vector       Data_out_01111111
     initialize to DS_low
     receive Data
     set     Data         to         "01111111"
end vector

vector       Data_out_11111111
     initialize to DS_low
     receive Data
     set     Data         to         "11111111"
end vector

vector       Data_out_11111110
     initialize to DS_low
     receive Data
     set     Data         to         "11111110"
end vector

vector       Data_out_11111100
     initialize to DS_low
     receive Data
     set     Data         to         "11111100"
end vector

vector       Data_out_11111000
     initialize to DS_low
     receive Data
     set     Data         to         "11111000"
end vector

vector       Data_out_11110000
     initialize to DS_low
     receive Data
     set     Data         to         "11110000"
end vector

vector       DS_high
     set     AC           to         "1"
     set     DS_bar       to         "1"
     set     BUSY_bar    to         "0"
end vector

vector       AC_low
     set     AC           to         "0"
     set     DS_bar       to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Write
     initialize to Read
     set     WE_bar       to         "0"
end vector

vector       Data_in_00000000
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "00000000"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_00000001
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "00000001"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_00000011
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "00000011"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_00000111
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "00000111"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_00001111
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "00001111"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_00011111
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "00011111"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_00111111
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "00111111"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_01111111
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "01111111"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_11111111
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "11111111"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_11111110
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "11111110"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_11111100
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "11111100"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_11111000
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "11111000"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_11110000
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data         to         "11110000"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid
     drive Data
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data         to         "kkkkkkkk"
     set     BUSY_bar     to         "0"
end vector

vector       CS_false
     set     AC           to         "0"
     set     DS_bar       to         "1"
     set     CS_bar       to         "1"
     set     Address      to         "kkkkkkkkkkkk"
     set     WE_bar       to         "0"
     set BUSY_bar         to         "0"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector       Data_out_D0_0
     initialize to DS_low
     receive Data_D0
     set     Data_D0      to         "0"
end vector

vector       Data_out_D0_1
     initialize to DS_low
     receive Data_D0
     set     Data_D0      to         "1"
end vector

vector       Data_out_D1_0
     initialize to DS_low
     receive Data_D1
     set     Data_D1      to         "0"
end vector

vector       Data_out_D1_1
     initialize to DS_low
     receive Data_D1
     set     Data_D1      to         "1"
end vector

vector       Data_out_D2_0
     initialize to DS_low
     receive Data_D2
     set     Data_D2      to         "0"
end vector

vector       Data_out_D2_1
     initialize to DS_low
     receive Data_D2
     set     Data_D2      to         "1"
end vector

vector       Data_out_D3_0
     initialize to DS_low
     receive Data_D3
     set     Data_D3      to         "0"
end vector

vector       Data_out_D3_1
     initialize to DS_low
     receive Data_D3
     set     Data_D3      to         "1"
end vector

vector       Data_out_D4_0
     initialize to DS_low
     receive Data_D4
     set     Data_D4      to         "0"
end vector

vector       Data_out_D4_1
     initialize to DS_low
     receive Data_D4
     set     Data_D4      to         "1"
end vector

vector       Data_out_D5_0
     initialize to DS_low
     receive Data_D5
     set     Data_D5      to         "0"
end vector

vector       Data_out_D5_1
     initialize to DS_low
     receive Data_D5
     set     Data_D5      to         "1"
end vector

vector       Data_out_D6_0
     initialize to DS_low
     receive Data_D6
     set     Data_D6      to         "0"
end vector

vector       Data_out_D6_1
     initialize to DS_low
     receive Data_D6
     set     Data_D6      to         "1"
end vector

vector       Data_out_D7_0
     initialize to DS_low
     receive Data_D7
     set     Data_D7      to         "0"
end vector

vector       Data_out_D7_1
     initialize to DS_low
     receive Data_D7
     set     Data_D7      to         "1"
end vector

vector       Data_in_D0_0
     drive Data_D0
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D0      to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D0_1
     drive Data_D0
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D0      to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D1_0
     drive Data_D1
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D1      to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D1_1
     drive Data_D1
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D1      to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D2_0
     drive Data_D2
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D2      to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D2_1
     drive Data_D2
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D2      to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D3_0
     drive Data_D3
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D3      to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D3_1
     drive Data_D3
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D3      to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D4_0
     drive Data_D4
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D4      to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D4_1
     drive Data_D4
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D4      to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D5_0
     drive Data_D5
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D5      to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D5_1
     drive Data_D5
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D5      to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D6_0
     drive Data_D6
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D6      to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D6_1
     drive Data_D6
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D6      to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D7_0
     drive Data_D7
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D7      to         "0"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_D7_1
     drive Data_D7
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     WE_bar       to         "0"
     set     Data_D7      to         "1"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid_D0
     drive Data_D0
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data_D0      to         "k"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid_D1
     drive Data_D1
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data_D1      to         "k"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid_D2
     drive Data_D2
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data_D2      to         "k"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid_D3
     drive Data_D3
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data_D3      to         "k"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid_D4
     drive Data_D4
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data_D4      to         "k"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid_D5
     drive Data_D5
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data_D5      to         "k"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid_D6
     drive Data_D6
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data_D6      to         "k"
     set     BUSY_bar     to         "0"
end vector

vector       Data_in_valid_D7
     drive Data_D7
     set     AC           to         "1"
     set     DS_bar       to         "0"
     set     Data_D7      to         "k"
     set     BUSY_bar     to         "0"
end vector

!*******************************************************************************

!    BUSY_bar cannot be tested, therefore it is listed as an input rather than
!    bidirectional.


sub        Data_read (Address,Data)
     execute        Address
     execute        Read
     execute        AC_high
     execute        DS_low
     execute        Data
     execute        DS_high
     execute        AC_low
end sub

sub        Data_write (Address,Data)
     execute        Address
     execute        Write
     execute        AC_high
     execute        Data
     execute        Data_in_valid
     execute        DS_high
     execute        AC_low
end sub

!AT The following subroutines have been added for a minimum pins test.
!AT Vectors in the subroutine "Write_Data" reference the entire data bus.
!AT Therefore this subroutine was copied and modified to reference only
!AT a single pin of the data bus. The subroutine "Read_Data" did not
!AT require any modification as all references to the data bus are made
!AT via a passed parameter (Data). This reference can be modified in the
!AT call statement.

sub        Data_write_Dx (Address, Data_Dx, Data_in_valid_Dx)
     execute        Address
     execute        Write
     execute        AC_high
     execute        Data_Dx
     execute        Data_in_valid_Dx
     execute        DS_high
     execute        AC_low
end sub

!*******************************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit   "awaretest D0 Test"

   call  Data_write_Dx (Address_000000000000, Data_in_D0_0, Data_in_valid_D0)
   call  Data_read (Address_000000000000, Data_out_D0_0)

   call  Data_write_Dx (Address_000000000000, Data_in_D0_1, Data_in_valid_D0)
   call  Data_read (Address_000000000000, Data_out_D0_1)

end unit

unit   "awaretest D1 Test"

   call  Data_write_Dx (Address_000000000000, Data_in_D1_0, Data_in_valid_D1)
   call  Data_read (Address_000000000000, Data_out_D1_0)

   call  Data_write_Dx (Address_000000000000, Data_in_D1_1, Data_in_valid_D1)
   call  Data_read (Address_000000000000, Data_out_D1_1)

end unit

unit   "awaretest D2 Test"

   call  Data_write_Dx (Address_000000000000, Data_in_D2_0, Data_in_valid_D2)
   call  Data_read (Address_000000000000, Data_out_D2_0)

   call  Data_write_Dx (Address_000000000000, Data_in_D2_1, Data_in_valid_D2)
   call  Data_read (Address_000000000000, Data_out_D2_1)

end unit

unit   "awaretest D3 Test"

   call  Data_write_Dx (Address_000000000000, Data_in_D3_0, Data_in_valid_D3)
   call  Data_read (Address_000000000000, Data_out_D3_0)

   call  Data_write_Dx (Address_000000000000, Data_in_D3_1, Data_in_valid_D3)
   call  Data_read (Address_000000000000, Data_out_D3_1)

end unit

unit   "awaretest D4 Test"

   call  Data_write_Dx (Address_000000000000, Data_in_D4_0, Data_in_valid_D4)
   call  Data_read (Address_000000000000, Data_out_D4_0)

   call  Data_write_Dx (Address_000000000000, Data_in_D4_1, Data_in_valid_D4)
   call  Data_read (Address_000000000000, Data_out_D4_1)

end unit

unit   "awaretest D5 Test"

   call  Data_write_Dx (Address_000000000000, Data_in_D5_0, Data_in_valid_D5)
   call  Data_read (Address_000000000000, Data_out_D5_0)

   call  Data_write_Dx (Address_000000000000, Data_in_D5_1, Data_in_valid_D5)
   call  Data_read (Address_000000000000, Data_out_D5_1)

end unit

unit   "awaretest D6 Test"

   call  Data_write_Dx (Address_000000000000, Data_in_D6_0, Data_in_valid_D6)
   call  Data_read (Address_000000000000, Data_out_D6_0)

   call  Data_write_Dx (Address_000000000000, Data_in_D6_1, Data_in_valid_D6)
   call  Data_read (Address_000000000000, Data_out_D6_1)

end unit

unit   "awaretest D7 Test"

   call  Data_write_Dx (Address_000000000000, Data_in_D7_0, Data_in_valid_D7)
   call  Data_read (Address_000000000000, Data_out_D7_0)

   call  Data_write_Dx (Address_000000000000, Data_in_D7_1, Data_in_valid_D7)
   call  Data_read (Address_000000000000, Data_out_D7_1)

end unit

unit       "RAM Test"

!    INITIALIZE RAM
     call           Data_write (Address_000000000000,Data_in_11111111)
     call           Data_write (Address_000000000001,Data_in_00000000)
     call           Data_write (Address_000000000011,Data_in_00000000)
     call           Data_write (Address_000000000111,Data_in_00000000)
     call           Data_write (Address_000000001111,Data_in_00000000)
     call           Data_write (Address_000000011111,Data_in_00000000)
     call           Data_write (Address_000000111111,Data_in_00000000)
     call           Data_write (Address_000001111111,Data_in_00000000)
     call           Data_write (Address_000011111111,Data_in_00000000)
     call           Data_write (Address_000111111111,Data_in_00000000)
     call           Data_write (Address_001111111111,Data_in_00000000)
     call           Data_write (Address_011111111111,Data_in_00000000)
     call           Data_write (Address_111111111111,Data_in_00000000)

!    TEST RAM CELLS

     call           Data_write (Address_000000000000,Data_in_00000000)
     call           Data_write (Address_000000000001,Data_in_00000001)
     call           Data_write (Address_000000000011,Data_in_00000011)
     call           Data_write (Address_000000000111,Data_in_00000111)
     call           Data_write (Address_000000001111,Data_in_00001111)
     call           Data_write (Address_000000011111,Data_in_00011111)
     call           Data_write (Address_000000111111,Data_in_00111111)
     call           Data_write (Address_000001111111,Data_in_01111111)
     call           Data_write (Address_000011111111,Data_in_11111111)
     call           Data_write (Address_000111111111,Data_in_11111110)
     call           Data_write (Address_001111111111,Data_in_11111100)
     call           Data_write (Address_011111111111,Data_in_11111000)
     call           Data_write (Address_111111111111,Data_in_11110000)

     call           Data_read (Address_000000000000,Data_out_00000000)
     call           Data_read (Address_000000000001,Data_out_00000001)
     call           Data_read (Address_000000000011,Data_out_00000011)
     call           Data_read (Address_000000000111,Data_out_00000111)
     call           Data_read (Address_000000001111,Data_out_00001111)
     call           Data_read (Address_000000011111,Data_out_00011111)
     call           Data_read (Address_000000111111,Data_out_00111111)
     call           Data_read (Address_000001111111,Data_out_01111111)
     call           Data_read (Address_000011111111,Data_out_11111111)
     call           Data_read (Address_000111111111,Data_out_11111110)
     call           Data_read (Address_001111111111,Data_out_11111100)
     call           Data_read (Address_011111111111,Data_out_11111000)
     call           Data_read (Address_111111111111,Data_out_11110000)

end unit

unit       "Test CS_bar"

     call           Data_write (Address_000000000000,Data_in_00000000)
     execute        Address_000000000000
     execute        CS_false
     execute        AC_high
     execute        Data_in_11111111
     execute        Data_in_valid
     execute        DS_high
     execute        AC_low
     call           Data_read (Address_000000000000,Data_out_00000000)

end unit


!    End of test