!!!!    6    0    1  987107435  Ve459                                         

! Device           : 41264
! Function         : 64k X 4 Dual Port Graphics Buffer
! revision         : B.01.00
! safeguard        : med_out_mos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

vector cycle  600n
receive delay 500n

assign   VCC            to pins  12    ! Note: Power connections are opposite
assign   GND            to pins  24    !       from most IC's!

assign   RAS_bar        to pins   8
assign   CAS_bar        to pins  18
assign   WB_WE_bar      to pins   7

assign   Address        to pins  13,  9, 10, 11, 14, 15, 16, 17
assign   Data           to pins  20, 19,  6,  5
assign   Data_D0        to pins  5              !AT Added for minimum pin test.
assign   Data_D1        to pins  6              !AT Added for minimum pin test.
assign   Data_D2        to pins  19             !AT Added for minimum pin test.
assign   Data_D3        to pins  20             !AT Added for minimum pin test.

assign   DT_OE_bar      to pins   4

assign   SC             to pins   1
assign   SOE_bar        to pins  21

assign   Serial_Out     to pins  23, 22,  3,  2
assign   Serial_D0      to pins  2              !AT Added for minimum pin test.
assign   Serial_D1      to pins  3              !AT Added for minimum pin test.
assign   Serial_D2      to pins  22             !AT Added for minimum pin test.
assign   Serial_D3      to pins  23             !AT Added for minimum pin test.

family   TTL

power    VCC, GND

format hexadecimal Data, Serial_Out

inputs         WB_WE_bar, RAS_bar, CAS_bar, Address, SC, SOE_bar, DT_OE_bar
outputs        Serial_Out
bidirectional  Data
bidirectional  Data_D0,Data_D1,Data_D2,Data_D3  !AT Added for minimum pin test.
outputs Serial_D0,Serial_D1,Serial_D2,Serial_D3 !AT Added for minimum pin test.

disable  Data        with  DT_OE_bar   to "1"
disable  Data        with  WB_WE_bar   to "0"
disable  Data        with  CAS_bar     to "1"

disable  Serial_Out  with  SOE_bar     to "1"

when  WB_WE_bar   is "0"   inputs      Data
when  WB_WE_bar   is "1"   outputs     Data

when  SOE_bar     is "1"   inactive    Serial_Out

trace Data        to RAS_bar, CAS_bar, WB_WE_bar, DT_OE_bar, Address
trace Serial_Out  to Ras_bar, Cas_bar, WB_WE_bar, DT_OE_bar, Address
trace Serial_Out  to Data, SC, SOE_bar

!*****************************************************************
!*****************************************************************

vector   Initialize
   set   Address     to "00000000"
   set   RAS_bar     to "1"
   set   CAS_bar     to "1"
   set   WB_WE_bar   to "1"
   set   DT_OE_bar   to "1"
   set   SC          to "0"
   set   SOE_bar     to "1"
end vector

vector   Keep_Control
   set   Address     to "kkkkkkkk"
   set   RAS_bar     to "k"
   set   CAS_bar     to "k"
   set   WB_WE_bar   to "k"
   set   DT_OE_bar   to "k"
   set   SC          to "k"
   set   SOE_bar     to "k"
end vector

vector   RAS_false
   initialize to  Keep_Control
   set   RAS_bar     to "1"
end vector

vector   RAS_true
   initialize to  Keep_Control
   set   RAS_bar     to "0"
end vector

vector   CAS_true
   initialize to  Keep_Control
   set   CAS_bar     to "0"
end vector

vector   Write
   initialize to  Keep_Control
   drive Data
   set   Data        to "k"
   set   WB_WE_bar   to "0"
end vector

vector   DT_true
   initialize to  Keep_Control
   set   DT_OE_bar   to "0"
end vector

vector   DT_false
   initialize to  Keep_Control
   set   DT_OE_bar   to "1"
end vector

vector   End_Cycle
   initialize to  Keep_Control
   set   RAS_bar     to "1"
   set   CAS_bar     to "1"
   set   WB_WE_bar   to "1"
   set   DT_OE_bar   to "1"
end vector

vector   SC_toggle
   initialize to  Keep_Control
   set   SC          to "t"
end vector

vector   SOE_true
   initialize to  Keep_Control
   set   SOE_bar     to "0"
end vector

!
!  Address Vectors
!

vector   Address_00000000
   initialize to  Keep_Control
   set   Address     to "00000000"
end vector

vector   Address_00000001
   initialize to  Keep_Control
   set   Address     to "00000001"
end vector

vector   Address_00000010
   initialize to  Keep_Control
   set   Address     to "00000010"
end vector

vector   Address_00000100
   initialize to  Keep_Control
   set   Address     to "00000100"
end vector

vector   Address_00001000
   initialize to  Keep_Control
   set   Address     to "00001000"
end vector

vector   Address_00010000
   initialize to  Keep_Control
   set   Address     to "00010000"
end vector

vector   Address_00100000
   initialize to  Keep_Control
   set   Address     to "00100000"
end vector

vector   Address_01000000
   initialize to  Keep_Control
   set   Address     to "01000000"
end vector

vector   Address_10000000
   initialize to  Keep_Control
   set   Address     to "10000000"
end vector

!
!  Data Vectors
!

vector   Data_5_drive
   initialize to  Keep_Control
   drive Data
   set   Data        to "5"
end vector

vector   Data_A_drive
   initialize to  Keep_Control
   drive Data
   set   Data        to "A"
end vector

vector   Data_5_rcv
   initialize to  Keep_Control
   receive Data
   set   DT_OE_bar   to "0"
   set   Data        to "5"
end vector

vector   Data_A_rcv
   initialize to  Keep_Control
   receive Data
   set   DT_OE_bar   to "0"
   set   Data        to "A"
end vector

vector   Data_5_rcv_OE_false
   initialize to  Keep_Control
   receive Data
   set   DT_OE_bar   to "1"
   set   Data        to "5"
end vector

vector   Data_A_rcv_OE_false
   initialize to  Keep_Control
   receive Data
   set   DT_OE_bar   to "1"
   set   Data        to "A"
end vector

vector Serial_Out_5
   initialize to  Keep_Control
   set Serial_Out    to "5"
end vector

vector Serial_Out_A
   initialize to  Keep_Control
   set Serial_Out    to "A"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector   Write_D0
   initialize to  Keep_Control
   drive Data_D0
   set   Data_D0     to "k"
   set   WB_WE_bar   to "0"
end vector

vector   Data_D0_0_drive
   initialize to  Keep_Control
   drive Data_D0
   set   Data_D0     to "0"
end vector

vector   Data_D0_1_drive
   initialize to  Keep_Control
   drive Data_D0
   set   Data_D0     to "1"
end vector

vector   Data_D0_0_rcv
   initialize to  Keep_Control
   receive Data_D0
   set   DT_OE_bar   to "0"
   set   Data_D0     to "0"
end vector

vector   Data_D0_1_rcv
   initialize to  Keep_Control
   receive Data_D0
   set   DT_OE_bar   to "0"
   set   Data_D0     to "1"
end vector

vector   Write_D1
   initialize to  Keep_Control
   drive Data_D1
   set   Data_D1     to "k"
   set   WB_WE_bar   to "0"
end vector

vector   Data_D1_0_drive
   initialize to  Keep_Control
   drive Data_D1
   set   Data_D1     to "0"
end vector

vector   Data_D1_1_drive
   initialize to  Keep_Control
   drive Data_D1
   set   Data_D1     to "1"
end vector

vector   Data_D1_0_rcv
   initialize to  Keep_Control
   receive Data_D1
   set   DT_OE_bar   to "0"
   set   Data_D1     to "0"
end vector

vector   Data_D1_1_rcv
   initialize to  Keep_Control
   receive Data_D1
   set   DT_OE_bar   to "0"
   set   Data_D1     to "1"
end vector

vector   Write_D2
   initialize to  Keep_Control
   drive Data_D2
   set   Data_D2     to "k"
   set   WB_WE_bar   to "0"
end vector

vector   Data_D2_0_drive
   initialize to  Keep_Control
   drive Data_D2
   set   Data_D2     to "0"
end vector

vector   Data_D2_1_drive
   initialize to  Keep_Control
   drive Data_D2
   set   Data_D2     to "1"
end vector

vector   Data_D2_0_rcv
   initialize to  Keep_Control
   receive Data_D2
   set   DT_OE_bar   to "0"
   set   Data_D2     to "0"
end vector

vector   Data_D2_1_rcv
   initialize to  Keep_Control
   receive Data_D2
   set   DT_OE_bar   to "0"
   set   Data_D2     to "1"
end vector

vector   Write_D3
   initialize to  Keep_Control
   drive Data_D3
   set   Data_D3     to "k"
   set   WB_WE_bar   to "0"
end vector

vector   Data_D3_0_drive
   initialize to  Keep_Control
   drive Data_D3
   set   Data_D3     to "0"
end vector

vector   Data_D3_1_drive
   initialize to  Keep_Control
   drive Data_D3
   set   Data_D3     to "1"
end vector

vector   Data_D3_0_rcv
   initialize to  Keep_Control
   receive Data_D3
   set   DT_OE_bar   to "0"
   set   Data_D3     to "0"
end vector

vector   Data_D3_1_rcv
   initialize to  Keep_Control
   receive Data_D3
   set   DT_OE_bar   to "0"
   set   Data_D3     to "1"
end vector

!***************************************************************
!***************************************************************

sub   Set_Up   ! 8 ras cycles
   execute  Initialize

   repeat 8 times
      execute  RAS_true
      execute  RAS_false
   end repeat
end sub

sub   Read_cycle (Address, Data)
   execute  Address
   execute  RAS_true
   execute  CAS_true
   execute  Data
   execute  End_Cycle
end sub

sub   Write_cycle (Address, Data)
   execute  Address
   execute  RAS_true
   execute  CAS_true
   execute  Data
   execute  Write
   execute  End_Cycle
end sub

sub   Write_cycle_2 (RAS_Add, CAS_Add, Data)
   execute  RAS_Add
   execute  RAS_true
   execute  CAS_Add
   execute  CAS_true
   execute  Data
   execute  Write
   execute  End_Cycle
end sub

sub   Data_Transfer (Address)
   execute  Address
   execute  DT_true
   execute  RAS_true
   execute  CAS_true
   execute  DT_false
   execute  End_Cycle
end sub

!AT The following subroutines have been added for a minimum pins test.
!AT Vectors in the subroutine "Write_cycle" reference the entire data bus.
!AT Therefore this subroutine was copied and modified to reference only
!AT a single pin of the data bus. The subroutine "Read" did not
!AT require any modification as all references to the data bus are made
!AT via a passed parameter (Read_cycle). This reference can be modified in the
!AT call statement.

sub  Write_cycle_Dx (Address, Data_Dx, Write_Dx)
   execute  Address
   execute  RAS_true
   execute  CAS_true
   execute  Data_Dx
   execute  Write_Dx
   execute  End_Cycle
end sub

!****************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit   "awaretest D0 Test"

   call  Set_Up

   call  Write_cycle_Dx (Address_00000000, Data_D0_0_drive, Write_D0)
   call  Read_cycle  (Address_00000000, Data_D0_0_rcv)

   call  Write_cycle_Dx (Address_00000000, Data_D0_1_drive, Write_D0)
   call  Read_cycle  (Address_00000000, Data_D0_1_rcv)

end unit

unit   "awaretest D1 Test"

   call  Set_Up

   call  Write_cycle_Dx (Address_00000000, Data_D1_0_drive, Write_D1)
   call  Read_cycle  (Address_00000000, Data_D1_0_rcv)

   call  Write_cycle_Dx (Address_00000000, Data_D1_1_drive, Write_D1)
   call  Read_cycle  (Address_00000000, Data_D1_1_rcv)

end unit

unit   "awaretest D2 Test"

   call  Set_Up

   call  Write_cycle_Dx (Address_00000000, Data_D2_0_drive, Write_D2)
   call  Read_cycle  (Address_00000000, Data_D2_0_rcv)

   call  Write_cycle_Dx (Address_00000000, Data_D2_1_drive, Write_D2)
   call  Read_cycle  (Address_00000000, Data_D2_1_rcv)

end unit

unit   "awaretest D3 Test"

   call  Set_Up

   call  Write_cycle_Dx (Address_00000000, Data_D3_0_drive, Write_D3)
   call  Read_cycle  (Address_00000000, Data_D3_0_rcv)

   call  Write_cycle_Dx (Address_00000000, Data_D3_1_drive, Write_D3)
   call  Read_cycle  (Address_00000000, Data_D3_1_rcv)

end unit

unit  "Random Access Port Test"
   call  Set_Up

   call  Write_cycle (Address_00000000, Data_5_drive)
   call  Write_cycle (Address_00000001, Data_5_drive)
   call  Write_cycle (Address_00000010, Data_5_drive)
   call  Write_cycle (Address_00000100, Data_5_drive)
   call  Write_cycle (Address_00001000, Data_5_drive)
   call  Write_cycle (Address_00010000, Data_5_drive)
   call  Write_cycle (Address_00100000, Data_5_drive)
   call  Write_cycle (Address_01000000, Data_5_drive)
   call  Write_cycle (Address_10000000, Data_5_drive)

   call  Read_cycle  (Address_00000000, Data_5_rcv)
   call  Write_cycle (Address_00000000, Data_A_drive)

   call  Read_cycle  (Address_00000001, Data_5_rcv)
   call  Write_cycle (Address_00000001, Data_A_drive)

   call  Read_cycle  (Address_00000010, Data_5_rcv)
   call  Write_cycle (Address_00000010, Data_A_drive)

   call  Read_cycle  (Address_00000100, Data_5_rcv)
   call  Write_cycle (Address_00000100, Data_A_drive)

   call  Read_cycle  (Address_00001000, Data_5_rcv)
   call  Write_cycle (Address_00001000, Data_A_drive)

   call  Read_cycle  (Address_00010000, Data_5_rcv)
   call  Write_cycle (Address_00010000, Data_A_drive)

   call  Read_cycle  (Address_00100000, Data_5_rcv)
   call  Write_cycle (Address_00100000, Data_A_drive)

   call  Read_cycle  (Address_01000000, Data_5_rcv)
   call  Write_cycle (Address_01000000, Data_A_drive)

   call  Read_cycle  (Address_10000000, Data_5_rcv)
   call  Write_cycle (Address_10000000, Data_A_drive)

   call  Read_cycle  (Address_00000000, Data_A_rcv)
   call  Read_cycle  (Address_00000001, Data_A_rcv)
   call  Read_cycle  (Address_00000010, Data_A_rcv)
   call  Read_cycle  (Address_00000100, Data_A_rcv)
   call  Read_cycle  (Address_00001000, Data_A_rcv)
   call  Read_cycle  (Address_00010000, Data_A_rcv)
   call  Read_cycle  (Address_00100000, Data_A_rcv)
   call  Read_cycle  (Address_01000000, Data_A_rcv)
   call  Read_cycle  (Address_10000000, Data_A_rcv)
end   unit

unit "Serial Port Test"
   call  Set_Up

   call  Write_cycle_2 (Address_00000000, Address_00000000, Data_5_drive)
   call  Write_cycle_2 (Address_00000000, Address_00000001, Data_A_drive)
   call  Data_Transfer (Address_00000000)

   execute  SOE_true

   execute  SC_toggle
   execute  SC_toggle
   execute  Serial_Out_5

   execute  SC_toggle
   execute  SC_toggle
   execute  Serial_Out_A
end unit

unit disable test "Test OE_bar"
   call  Set_Up

   call  Write_cycle (Address_00000000, Data_5_drive)
   call  Read_cycle  (Address_00000000, Data_5_rcv_OE_false)

   call  Write_cycle (Address_00000000, Data_A_drive)
   call  Read_cycle  (Address_00000000, Data_A_rcv_OE_false)
end unit

unit disable test "Test SOE_bar"
   call  Set_Up

   call  Write_cycle_2 (Address_00000000, Address_00000000, Data_5_drive)
   call  Write_cycle_2 (Address_00000000, Address_00000001, Data_A_drive)
   call  Data_Transfer (Address_00000000)

   execute  SC_toggle
   execute  SC_toggle
   execute  Serial_Out_5

   execute  SC_toggle
   execute  SC_toggle
   execute  Serial_Out_A
end unit

!
!  End of test
!